參數(shù)資料
型號: 74LVTH2245SJX
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: 8-Bit Identity/Magnitude Comparators (P=Q) with Enable 20-SOIC -40 to 85
中文描述: LVT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20
封裝: 5.30 MM, LEAD FREE, EIAJ TYPE2, SOP-20
文件頁數(shù): 5/9頁
文件大?。?/td> 106K
代理商: 74LVTH2245SJX
5
www.fairchildsemi.com
7
AC Electrical Characteristics
Note 10:
Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
).
Capacitance
(Note 11)
Note 11:
Capacitance is measured at frequency f
1 MHz, per MIL-STD-883, Method 3012.
Symbol
Parameter
T
A
40
q
C to 85
q
C
C
L
50 pF, R
L
500
:
Units
V
CC
3.3V
r
0.3V
Min
1.2
1.2
1.2
V
CC
2.7V
Min
1.2
1.2
1.2
Max
4.4
4.4
3.6
Max
5.1
5.1
4.0
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PHZ
t
PLZ
t
OSHL
t
OSLH
t
OSHL
t
OSLH
Propagation Delay Data to B Port Output
ns
Propagation Delay Data to A Port Output
ns
1.2
1.3
1.7
3.5
6.2
6.2
1.2
1.3
1.7
4.0
7.3
7.3
Output Enable Time for B Port Output
ns
Output Enable Time for A Port Output
1.3
1.7
2.0
5.5
5.7
5.9
1.3
1.7
2.0
7.1
6.7
6.5
ns
Output Disable Time for B Port Output
ns
2.0
2.0
2.0
5.4
5.9
5.0
2.0
2.0
2.0
5.7
6.5
5.1
Output Disable Time for A Port Output
ns
A Port Output to Output Skew
(Note 10)
B Port Output to Output Skew
1.0
1.0
ns
1.0
1.0
ns
(Note 10)
Symbol
Parameter
Conditions
Typical
4
8
Units
pF
pF
C
IN
C
I/O
Input Capacitance
Input/Output Capacitance
V
CC
0V, V
I
0V or V
CC
V
CC
3.0V, V
O
0V or V
CC
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74LVTH2245WM 8-Bit Identity/Magnitude Comparators (P=Q) with Enable 20-SOIC -40 to 85
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