參數(shù)資料
型號(hào): 74LVTH16952MTDX
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Low Voltage 16-Bit Registered Transceiver with 3-STATE Outputs
中文描述: LVT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
封裝: 6.10 MM, MO-153, TSSOP-56
文件頁數(shù): 6/8頁
文件大小: 75K
代理商: 74LVTH16952MTDX
www.fairchildsemi.com
6
7
AC Electrical Characteristics
Note 10:
Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
).
Capacitance
(Note 11)
Note 11:
Capacitance is measured at frequency f
=
1 MHz, per MIL-STD-883, Method 3012.
Symbol
Parameter
T
A
=
40
°
C to
+
85
°
C
C
L
=
50 pF, R
L
=
500
V
CC
=
3.3
±
0.3V
Min
Max
150
1.3
4.4
1.3
4.8
Units
V
CC
=
2.7V
Min
150
1.3
1.3
Max
f
MAX
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
W
t
S
Maximum Clock Frequency
Propagation Delay
CPBA or CPAB to A or B
MHz
4.7
5.0
ns
Output Enable Time
OE to A or B
Output Disable Time
1.0
1.0
2.1
4.3
4.8
5.7
1.0
1.0
2.1
4.9
5.7
6.2
ns
ns
OE to A or B
Pulse Width, CPAB or CPBA HIGH or LOW
Setup Time
2.1
3.3
1.7
5.1
2.1
3.3
2.5
5.3
ns
A or B before CPAB or CPBA
ns
CEA or CEB before CPAB or CPBA
2.0
2.8
t
H
Hold Time
A or B after CPAB or CPBA
0.8
0.0
ns
CEA or CEB after CPAB or CPBA
0.4
0.0
t
OSLH
t
OSHL
Output to Output Skew (Note 10)
1.0
1.0
1.0
1.0
ns
Symbol
C
IN
C
I/O
Parameter
Conditions
Typical
4
8
Units
pF
pF
Input Capacitance
Input/Output Capacitance
V
CC
=
OPEN, V
I
=
0V or V
CC
V
CC
=
3.0V, V
O
=
0V or V
CC
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