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參數(shù)資料
| 型號： | 74LVTH16373GX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Low Voltage 16-Bit Transparent Latch with 3-STATE Outputs |
| 中文描述： | LVT SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PBGA54 |
| 封裝： | 5.50 MM, PLASTIC, MO-205, FBGA-54 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 98K |
| 代理商： | 74LVTH16373GX |
2005 Fairchild Semiconductor Corporation
DS012021
www.fairchildsemi.com
January 1999
Revised June 2005
7
74LVT16373
74LVTH16373
Low Voltage 16-Bit Transparent Latch
with 3-STATE Outputs
General Description
The LVT16373 and LVTH16373 contain sixteen non-invert-
ing latches with 3-STATE outputs and is intended for bus
oriented applications. The device is byte controlled. The
flip-flops appear transparent to the data when the Latch
Enable (LE) is HIGH. When LE is LOW, the data that meets
the setup time is latched. Data appears on the bus when
the Output Enable (OE) is LOW. When OE is HIGH, the
outputs are in a high impedance state.
The LVTH16373 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These latches are designed for low-voltage (3.3V) V
CC
applications, but with the capability to provide a TTL inter-
face to a 5V environment. The LVT16373 and LVTH16373
are fabricated with an advanced BiCMOS technology to
achieve high speed operation similar to 5V ABT while
maintaining a low power dissipation.
Features
I
Input and output interface capability to systems at
5V V
CC
I
Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH16373),
also available without bushold feature (74LVT16373)
I
Live insertion/extraction permitted
I
Power Up/Power Down high impedance provides
glitch-free bus loading
I
Outputs source/sink 32 mA/ 64 mA
I
Functionally compatible with the 74 series 16373
I
Latch-up performance exceeds 500 mA
I
ESD performance:
Human-body model
!
2000V
Machine model
!
200V
Charged-device model
!
1000V
I
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA) (Preliminary)
Ordering Code:
Note 1:
BGA package available in Tape and Reel only.
Note 2:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Order Number
74LVT16373GX
(Note 1)
74LVT16373MEA
(Note 2)
74LVT16373MTD
(Note 2)
74LVTH16373GX
(Note 1)
74LVTH16373MEA
(Note 2)
74LVTH16373MTD
(Note 2)
Package Number
BGA54A
(Preliminary)
MS48A
Package Description
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[TAPE and REEL]
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
BGA54A
(Preliminary)
MS48A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[TAPE and REEL]
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74LVTH16373MEA | 功能描述:閉鎖 16-Bit Trans Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74LVTH16373MEA_Q | 功能描述:閉鎖 16-Bit Trans Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74LVTH16373MEAX | 功能描述:閉鎖 16-Bit Trans Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74LVTH16373MER | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74LVTH16373MTD | 功能描述:閉鎖 16-Bit Trans Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
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