參數(shù)資料
型號(hào): 74LVT16652A
廠商: NXP Semiconductors N.V.
英文描述: 4-Line To 10-Line Decoders (1 of 10) 16-PDIP -40 to 85
中文描述: 3.3V的小型終端16位總線收發(fā)器/寄存器三態(tài)
文件頁數(shù): 2/12頁
文件大?。?/td> 101K
代理商: 74LVT16652A
Philips Semiconductors
Product specification
74LVT16652A
3.3V 16-bit bus transceiver/register (3-State)
2
1998 Feb 19
853-1767 18986
FEATURES
16-bit bus interface
3-State buffers
Output capability: +64mA/-32mA
TTL input and output switching levels
Input and output interface capability to systems at 5V supply
Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
Live insertion/extraction permitted
Power-up reset
Power-up 3-State
No bus current loading when output is tied to 5V bus
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION
The 74LVT16652A is a high-performance BiCMOS product
designed for V
CC
operation at 3.3V. The device can be used as two
8-bit transceivers or one 16-bit transceiver.
Complimentary output-enable (OEAB and OEBA) inputs are
provided to control the transceiver functions. Select-control (SAB
and SBA) inputs are provided to select whether real-time or stored
data is transferred. A Low-input level selects real-time data, and a
High input level selects stored data. The circuitry used for select
control eliminates the typical decoding glitch that occurs in a
multiplexer during the transition between stored and real-time data.
Data on the A or B bus, or both, can be stored in the internal
flip-flops by Low-to-High transitions at the appropriate clock (CPAB
or CPBA) inputs regardless of the levels on the select-control or
output-enable inputs. When SAB and SBA are in real-time transfer
mode, it is possible to store data without using the internal D-type
flip-flops by simultaneously enabling OEAB and OEBA. In this
configuration, each output reinforces its input. Thus, when all other
data sources to the two sets of bus lines are at high impedance,
each set of bus lines remains at its last level configuration.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
°
C
TYPICAL
UNIT
t
PLH
t
PHL
C
IN
C
I/O
I
CCZ
Propagation delay
nAx to nBx or nBx to nAx
Input capacitance Control pins
I/O pin capacitance
Total supply current
C
L
= 50pF;
V
CC
= 3.3V
V
I
= 0V or 3.0V
Outputs disabled; V
I
= 0V or 3.0V
Outputs disabled; V
CC
= 3.6V
1.9
ns
3
9
70
pF
pF
μ
A
ORDERING INFORMATION
PACKAGES
56-Pin Plastic SSOP Type III
56-Pin Plastic TSSOP Type II
TEMPERATURE RANGE
–40
°
C to +85
°
C
–40
°
C to +85
°
C
OUTSIDE NORTH AMERICA
74LVT16652A DL
74LVT16652A DGG
NORTH AMERICA
VT16652A DL
VT16652A DGG
DWG NUMBER
SOT371-1
SOT364-1
LOGIC SYMBOL (IEEE/IEC)
56
1
55
54
2
3
5
6
8
9
10
12
13
14
EN1(BA)
EN2(AB)
C3
G4
C5
G6
1
1
5D
6
1
6
4
3D
4
1
1
2
52
51
49
48
47
45
44
43
29
28
30
31
27
26
15
16
17
19
20
21
23
24
42
41
40
38
37
36
34
33
1
7
11D 12
1 12
10
9D
10
1
1
8
EN7(BA)
EN8(AB)
C9
G10
C11
G12
SW00158
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74LVT16652ADGG,118 功能描述:總線收發(fā)器 3.3V 16-BIT REG RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
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