參數(shù)資料
型號: 74LVT16646A
廠商: NXP Semiconductors N.V.
英文描述: 4-Line To 10-Line Decoders (1 of 10) 16-SOIC -40 to 85
中文描述: 3.3生根粉16位總線收發(fā)器三態(tài)
文件頁數(shù): 7/21頁
文件大小: 114K
代理商: 74LVT16646A
9397 750 14326
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 12 January 2005
7 of 21
Philips Semiconductors
74LVT16646A
3.3 V 16-bit bus transceiver; 3-state
7.
Functional description
7.1 Function table
[1]
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
= LOW-to-HIGH clock transition.
[2]
The data output function may be enabled or disabled by various signals at the nOE input. Data input functions are always enabled, i.e.
data at the bus pins will be stored on every LOW-to-HIGH transition of the clock.
V
CC
1B1
1B0
GND
1SBA
1CPBA
1OE
50
51
52
53
54
55
56
positive supply voltage
data input or output 1; B side
data input or output 0; B side
ground (0V)
select inputs 0 to 7; B to A side
clock inputs 0 to 7; B to A side
output enable inputs 0 to 7
Table 3:
Symbol
Pin description
…continued
Pin
Description
Table 4:
Operating mode
Function table
[1]
Inputs
nOE
X
Data I/O
nAx
input
reference
nDIR
X
nCPAB
nCPBA
X
nSAB
X
nSBA
X
nBx
unspecified
output
[2]
input
Store A (B unspecified)
Figure 5
c
Store B (A unspecified)
X
X
X
X
X
unspecified
output
[2]
input
input
output
output
input
input
Figure 5
c
Store A and B data
Isolation, hold storage
Real time B data to A bus
Stored B data to A bus
Real time A data to B bus
Stored A data to B bus
H
H
L
L
L
L
X
X
L
L
H
H
X
X
X
X
L
H
X
X
L
H
X
X
input
input
input
input
output
output
Figure 5
c
-
Figure 5
a
Figure 5
d
Figure 5
b
Figure 5
d
H or L
X
X
X
H or L
H or L
X
H or L
X
X
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