參數(shù)資料
型號: 74LVC4245ADH
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: Hex Inverting Buffers And Line Drivers With 3-State Outputs 16-TSSOP -40 to 85
中文描述: LVC/LCX/Z SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO24
文件頁數(shù): 8/16頁
文件大小: 90K
代理商: 74LVC4245ADH
1999 Jun 15
8
Philips Semiconductors
Product specification
Octal dual supply translating transceiver; 3-state
74LVC4245A
Fig.6 The 3-state enable and disable times.
handbook, full pagewidth
MNA367
tPLZ
tPHZ
outputs
disabled
outputs
enabled
VY
VX
outputs
enabled
OUTPUT
LOW-to-OFF
OFF-to-LOW
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
OE INPUT
VI
VOL
VOH
VCC
VM
GND
GND
tPZL
tPZH
VM
VM
V
M
= 1.5 V at 2.7 V
V
CCB
3.6 V;
V
M
= 0.5V
CCA
at V
CCA
4.5 V;
V
X
= V
OL
+ 0.3 V at V
CCB
3.6 V;
V
X
= V
OL
+ 0.1 (V
CCA
V
OL
) at V
CCA
4.5 V
V
Y
= V
OH
0.3 V at V
CCB
3.6 V;
V
Y
= V
OH
0.1 (V
OH
GND) at V
CCA
4.5 V;
V
OL
and V
OH
are typical output voltage drop that occur with the output load.
Fig.7 Load circuitry for switching times.
Definitions for test circuit:
R
L
= Load resistor; see chapter “AC characteristics”.
C
= Load capacitance including jig and probe capacitance
(see chapter “AC characteristics”).
R
= Termination resistance should be equal to the output
impedance Z
0
of the pulse generator.
TEST
S
1
t
PLH
/t
PHL
t
PLZ
/t
PZL
t
PHZ
/t
PZH
open
2
×
V
CC
GND
V
CC
V
I
for A and B port
<2.7 V
for B port
2.7 to 3.6 V
for A port
4.5 to 5.5 V
V
CC
2.7 V
3.0 V
handbook, full pagewidth
open
GND
50 pF
2
×
VCC
VCC
VI
VO
MNA368
D.U.T.
CL
RT
RL
500
RL
500
PULSE
GENERATOR
S1
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