參數(shù)資料
型號： 74LVC322245A
廠商： NXP Semiconductors N.V.
英文描述： Hex Buffers And Line Drivers With 3-State Outputs 16-TSSOP -40 to 85
中文描述： 3態(tài)輸出六緩沖線性驅(qū)動器 TSSOP-16封裝 工作溫度：-40℃_85℃
文件頁數(shù)： 2/16頁
文件大?。?/td> 87K
代理商： 74LVC322245A
1999 Sep 01
2
Philips Semiconductors
Product specification
32-bit bus transceiver with direction pin; 30
series termination resistors; 5 V tolerant; 3-state
74LVC322245A;
74LVCH322245A
FEATURES
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range of 1.2 to 3.6 V
Complies with JEDEC standard no. 8-1A
CMOS low power consumption
MULTIBYTE
flow-trough standard pin-out architecture
Low inductance multiple power and ground pins for
minimum noise and ground bounce
Direct interface with TTL levels
Bus hold on data inputs (74LVCH322245A only)
Integrated 30
termination resistors
Typical output ground bounce voltage:
V
OLP
<0.8 V at V
CC
= 3.3 V; T
amb
= 25
°
C
Typical output V
OH
undershoot voltage:
V
OHV
>2 V at V
CC
= 3.3 V; T
amb
= 25
°
C
Power-off disabled outputs, permitting live insertion
Plastic fine-pitch ball grid array package.
DESCRIPTION
The74LVC(H)322245Aisahigh-performance,low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families. Inputs can be
driven from either 3.3 or 5 V devices. In 3-state operation,
outputs can handle 5 V. These features allow the use of
these devices in a mixed 3.3 and 5 V environment.
The 74LVC(H)322245A is a 32-bit transceiver featuring
non-inverting 3-state bus compatible outputs in both send
and receive directions. The 74LVC(H)322245A features
two output enable (nOE) inputs for easy cascading and
two send or receive (nDIR) inputs for direction control.
nOE controls the outputs so that the buses are effectively
isolated. The 74LVC(H)322245A is designed with 30
series termination resistors in both HIGH and LOW output
stages to reduce line noise.
To ensure the high-impedance state during power-up or
power-down, input nOE should be tied to V
CC
through a
pull-up resistor; the minimum value of the resistor is
determined by the current-sinking capability of the driver.
The 74LVCH322245A bus hold data inputs eliminates the
need for external pull-up resistors to hold unused or
floating data inputs at a valid logic level (see Fig.2).
QUICK REFERENCE DATA
Ground = 0 V; T
amb
= 25
°
C; t
r
= t
f
≤
2.5 ns.
Note
1.
C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W).
P
D
= C
PD
×
V
CC2
×
f
i
+
Σ
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
Σ
(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
propagation delay
nA
n
to nB
n
; nB
n
to nA
n
input capacitance
input/output capacitance
power dissipation capacitance per
buffer
C
L
= 50 pF; V
CC
= 3.3 V
3.3
ns
C
I
C
I/O
C
PD
5.0
10
28
pF
pF
pF
V
I
= GND to V
CC
; note 1
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74LVC32245AEC,551 功能描述:總線收發(fā)器 32-BIT 5V TOL I/O RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
74LVC32245AEC,557 功能描述:總線收發(fā)器 32-BIT 5V TOL I/O RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
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