參數(shù)資料
型號： 74LVC245ATTR
廠商： 意法半導(dǎo)體
元件分類： 通用總線功能
英文描述： LOW VOLTAGE CMOS OCTAL BUS TRANSCEIVER (NOT INVERTED) HIGH PERFORMANCE
中文描述： 低電壓CMOS八進(jìn)制總線收發(fā)器（不內(nèi)陷）高性能
文件頁數(shù)： 2/10頁
文件大?。?/td> 97K
代理商： 74LVC245ATTR
Philips Semiconductors
Product specification
74LVC245A
74LVCH245A
Octal bus transceiver with direction pin with
5-volt tolerant inputs/outputs (3-State)
2
1998 May 20
853-2044 19419
FEATURES
5-volt tolerant inputs/outputs, for interfacing with 5-volt logic
Supply voltage range of 2.7V to 3.6V
Complies with JEDEC standard no. 8-1A
CMOS low power consumption
Direct interface with TTL levels
High impedance when V
CC
= 0V
Bushold on all data inputs (74LVCH245A only)
DESCRIPTION
The 74LVC245A/74LVCH245A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most advanced
CMOS compatible TTL families.
Inputs can be driven from either 3.3V or 5V devices. In 3-State
operation, outputs can handle 5V. These features allow the use of
these devices as translators in a mixed 3.3V/5V environment.
The 74LVC245A/74LVCH245A is an octal transceiver featuring
non-inverting 3-State bus compatible outputs in both send and
receive directions. The ’245’ features an output enable (OE) input for
easy cascading and a send/receive (DIR) input for direction control.
OE controls the outputs so that the buses are effectively isolated.
The ’245’ is functionally identical to the ’640’, but the ’640’ has true
(non-inverting) outputs.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
A
n
to B
n;
B
n
to A
n
Input capacitance
C
L
= 50pF
V
CC
= 3.3V
3.6
ns
C
I
C
I/O
5.0
pF
Input/output capacitance
10.0
pF
C
PD
Power dissipation capacitance per
buffer
Notes 1 and 2
33
pF
NOTE:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in W):
P
D
= C
PD
x V
CC2
x f
i
+ (C
L
x V
CC2
x f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacity in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
(C
L
x V
CC2
x f
o
) = sum of outputs.
2. The condition is V
I
= GND to V
CC
ORDERING INFORMATION
PACKAGES
TEMPERATURE
RANGE
OUTSIDE
NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
20-Pin Plastic Shrink Small Outline (SO)
–40
°
C to +85
°
C
74LVC245A D
74LVC245A D
SOT163-1
20-Pin Plastic Shrink Small Outline (SSOP) Type II
–40
°
C to +85
°
C
74LVC245A DB
74LVC245A DB
SOT339-1
20-Pin Plastic Thin Shrink Small Outline (TSSOP) Type I
–40
°
C to +85
°
C
74LVC245A PW
7LVC245APW DH
SOT360-1
20-Pin Plastic Shrink Small Outline (SO)
–40
°
C to +85
°
C
74LVCH245A D
74LVCH245A D
SOT163-1
20-Pin Plastic Shrink Small Outline (SSOP) Type II
–40
°
C to +85
°
C
74LVCH245A DB
74LVCH245A DB
SOT339-1
20-Pin Plastic Thin Shrink Small Outline (TSSOP) Type I
–40
°
C to +85
°
C
74LVCH245A PW
LVCH245APW DH
SOT360-1
相關(guān)PDF資料
PDF描述
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