參數(shù)資料
型號: 74LVC1G125
廠商: Texas Instruments, Inc.
英文描述: 8-Bit Addressable Latches 16-SO -40 to 85
中文描述: 單總線緩沖器門具有三態(tài)輸出
文件頁數(shù): 10/17頁
文件大?。?/td> 91K
代理商: 74LVC1G125
9397 750 13762
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 18 October 2004
10 of 17
Philips Semiconductors
74LVC1G175
Single D-type flip-flop with reset; positive-edge trigger
12. Waveforms
Measurement points are given in
Table 9
.
The shaded areas indicate when the input is permitted to change for predictable output
performance.
V
OL
and V
OH
are typical output voltage drop that occur with the output load.
The clock input (CP) to output (Q) propagation delays, the clock pulse width, the
D to CP set-up, the CP to D hold times and the maximum clock pulse frequency.
Fig 6.
Table 9:
Supply voltage
V
CC
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
4.5 V to 5.5 V
Measurement points
Output
V
M
0.5
×
V
CC
0.5
×
V
CC
1.5 V
1.5 V
0.5
×
V
CC
Input
V
M
0.5
×
V
CC
0.5
×
V
CC
1.5 V
1.5 V
0.5
×
V
CC
V
I
V
CC
V
CC
2.7 V
2.7 V
V
CC
t
r
= t
f
2.0 ns
2.0 ns
2.5 ns
2.5 ns
2.5 ns
001aaa465
t
h
t
su
t
h
t
PHL
t
W
t
PLH
t
su
1/f
max
V
M
V
M
V
M
V
I
GND
V
I
GND
CP input
D input
V
OH
V
OL
Q output
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