參數(shù)資料
型號: 74LVC16241ADGG,112
廠商: NXP Semiconductors
文件頁數(shù): 16/17頁
文件大?。?/td> 0K
描述: IC BUFF DVR TRI-ST 16BIT 48TSSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 39
系列: 74LVC
邏輯類型: 緩沖器/線路驅(qū)動器,非反相
元件數(shù): 4
每個元件的位元數(shù): 4
輸出電流高,低: 24mA,24mA
電源電壓: 1.2 V ~ 3.6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 48-TFSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 48-TSSOP
包裝: 管件
其它名稱: 935235130112
74LVC16241A
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 4 — 26 October 2011
8 of 17
NXP Semiconductors
74LVC16241A
16-bit buffer/line driver with 5 V tolerant inputs/outputs; 3-state
[1]
Typical values are measured at Tamb =25 C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.
[2]
tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[3]
CPD is used to determine the dynamic power dissipation (PD in W).
PD =CPD VCC2 fi N+ (CL VCC2 fo) where:
fi = input frequency in MHz; fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in Volts
N = number of inputs switching
(C
L VCC
2
f
o) = sum of the outputs
tdis
disable time
nOE to nYn; see Figure 6
VCC = 1.2 V
-
9.0
-
ns
VCC = 1.65 V to 1.95 V
2.4
4.3
8.3
2.4
9.2
ns
VCC = 2.3 V to 2.7 V
1.0
2.4
4.7
1.0
5.2
ns
VCC = 2.7 V
1.5
3.2
5.5
1.5
7.0
ns
VCC = 3.0 V to 3.6 V
1.5
3.0
5.0
1.5
6.5
ns
nOE to nYn; see Figure 7
VCC = 1.2 V
-
8.0
-
ns
VCC = 1.65 V to 1.95 V
1.5
3.5
8.4
1.5
9.6
ns
VCC = 2.3 V to 2.7 V
0.5
1.9
4.8
0.5
5.5
ns
VCC = 2.7 V
1.5
3.5
5.5
1.5
7.0
ns
VCC = 3.0 V to 3.6 V
1.0
2.6
5.0
1.0
6.5
ns
CPD
power
dissipation
capacitance
per input; VI =GND to VCC
VCC = 1.65 V to 1.95 V
-
8.4
-
pF
VCC = 2.3 V to 2.7 V
-
11.9
-
pF
VCC = 3.0 V to 3.6 V
-
15.0
-
pF
Table 7.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 8.
Symbol Parameter
Conditions
Tamb = 40 C to +85 C 40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
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