參數(shù)資料
型號(hào): 74LVC14APWDH
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: Hex inverting Schmitt-trigger with 5V tolerant input
中文描述: LVC/LCX/Z SERIES, HEX 1-INPUT INVERT GATE, PDSO14
文件頁(yè)數(shù): 2/10頁(yè)
文件大?。?/td> 95K
代理商: 74LVC14APWDH
Philips Semiconductors
Product specification
74LVC14A
Hex inverting Schmitt-trigger with 5V
tolerant input
2
1998 Apr 28
853-1907 19308
FEATURES
Wide supply voltage range of: 1.2 V to 3.6 V
In accordance with JEDEC standard no. 8-1A
Inputs accept voltages up to 5.5 V
CMOS low power consumption
Direct interface with TTL levels
APPLICATIONS
Wave and pulse shapers for highly noisy environments
Astable multivibrators
Monostable multivibrators
DESCRIPTION
The 74LVC14A is a high-performance, low power, low-voltage
Si-gate CMOS device and superior to most advanced CMOS
compatible TTL families.
Inputs can be driven from either 3.3 V or 5 V devices. This feature
allows the use of these devices as translators in a mixed 3.3 V/5 V
environment.
The 74LVC14A provides six inverting buffers with Schmitt-trigger
action. It is capable of transforming slowly changing input signals
into sharply defined, jitter-free output signals.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
t
f
2.5 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
PLH
/t
Propagation delay
nA to nY
C
L
= 50 pF;
V
CC
= 3.3 V
4
ns
y
C
I
C
PD
Input capacitance
3.5
pF
Power dissipation capacitance per gate
Notes 1 and 2
25
pF
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W)
P
D
= C
PD
×
V
CC2
×
f
i
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacity in pF;
f
o
= output frequency in MHz; V
= supply voltage in V;
(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
2. The condition is V
I
= GND to V
CC.
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
14-Pin Plastic SO
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
74LVC14A D
74LVC14A D
SOT108-1
14-Pin Plastic SSOP Type II
74LVC14A DB
74LVC14A DB
SOT337-1
14-Pin Plastic TSSOP Type I
74LVC14A PW
74LVC14APW DH
SOT402-1
PIN CONFIGURATION
1
2
3
4
5
6
7
1A
1Y
2A
2Y
3A
3Y
GND
VCC
6A
6Y
5A
5Y
4A
4Y
14
13
12
11
10
9
8
SV00396
PIN DESCRIPTION
PIN NUMBER
SYMBOL
NAME AND FUNCTION
1, 3, 5, 9, 11, 13
1A – 6A
Data inputs
2, 4, 6, 8, 10, 12
1Y – 6Y
Data outputs
7
GND
Ground (0 V)
14
V
CC
Positive supply voltage
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