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| 型號(hào)： | 74LV4094 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 8-stage shift-and-store bus register(8級(jí)移位--存儲(chǔ)總線寄存器) |
| 中文描述： | 8級(jí)移位并存儲(chǔ)總線寄存器（8級(jí)移位-存儲(chǔ)總線寄存器） |
| 文件頁(yè)數(shù)： | 2/14頁(yè) |
| 文件大?。?/td> | 105K |
| 代理商： | 74LV4094 |
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Philips Semiconductors
Product specification
74LV4094
8-stage shift-and-store bus register
2
1998 Jun 23
853-2078 19619
FEATURES
Optimized for low voltage applications: 1.0 to 3.6 V
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
Typical V
OLP
(output ground bounce) < 0.8 V at V
CC
= 3.3 V,
T
amb
= 25
°
C
Typical V
OHV
(output V
OH
undershoot) > 2 V at V
CC
= 3.3 V,
T
amb
= 25
°
C
Output capability: standard
I
CC
category: MSI
Applications:
Serial-to-parallel data conversion
Remote control holding register
DESCRIPTION
The 74LV4094 is a low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT4094.
The 74LV4094 is an 8-stage serial shift register having a storage
latch associated with each stage for strobing data from the serial
input (D) to the parallel buffered 3-State outputs (QP
0
to OP
7
). The
parallel outputs may be connected directly to the common bus lines.
Data is shifted on the positive-going clock (CP) transitions. The data
in each shift register is transferred to the storage register when the
strobe input (STR) is HIGH. Data in the storage register appears at
the outputs whenever the output enable input (OE) signal is HIGH.
Two serial outputs (QS
1
and QS
2
) are available for cascading a
number of 74LV4094 devices. Data is available at QS
1
on the
positive-going clock edges to allow high-speed operation in
cascaded systems in which the clock rise time is fast. The same
serial information is available at QS
2
on the next negative going
clock edge and is for cascading 74LV4094 devices when the clock
rise time is slow.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
=t
f
≤
2.5 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
CP to QS
1
CP to QS
2
CP to QP
n
STR to QP
n
Maximum clock frequency
C
L
= 15 pF;
V
CC
= 3.3 V
14
13
18
17
ns
f
MAX
C
I
95
MHz
Input capacitance
3.5
pF
C
PD
Power dissipation capacitance per gate
V
CC
= 3.3 V
V
I
= GND to V
CCNO TAG
83
pF
NOTE:
1.
C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W)
P
D
= C
PD
×
V
CC2
×
f
i
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacity in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
16-Pin Plastic DIL
–40
°
C to +125
°
C
74LV4094 N
74LV4094 N
SOT38-4
16-Pin Plastic SO
–40
°
C to +125
°
C
74LV4094 D
74LV4094 D
SOT109-1
PIN CONFIGURATION
SV01611
1
2
3
4
5
6
STR
D
CP
QP
0
QP
1
QP
2
V
CC
OE
QP
4
16
15
14
13
12
11
7
8
GND
QS
2
QS
1
10
9
QP
3
QP
5
QP
6
QP
7
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
1
STR
Strobe input
2
D
Serial input
3
CP
Clock input
4, 5, 6, 7, 14,
13, 12, 11
QP
0
to QP
7
Parallel outputs
8
GND
Ground (0 V)
9, 10
QS
1
, QS
2
OE
Serial outputs
15
Output enable input
16
V
CC
Positive supply voltage
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74LV423D | Dual retriggerable monostable multivibrator with reset |
| 74LV423DB | Dual retriggerable monostable multivibrator with reset |
| 74LV423N | Dual retriggerable monostable multivibrator with reset |
| 74LV423PW | Dual retriggerable monostable multivibrator with reset |
| 74LV423PWDH | Dual retriggerable monostable multivibrator with reset |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74LV4094D | 功能描述:計(jì)數(shù)器移位寄存器 8-ST SHIFT/STORE BUS REGISTER RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| 74LV4094D,112 | 功能描述:計(jì)數(shù)器移位寄存器 8-ST SHIFT/STORE BUS RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| 74LV4094D,118 | 功能描述:計(jì)數(shù)器移位寄存器 8-STAGE SHIFT AND STORE BUS REG RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| 74LV4094D,118-CUT TAPE | 制造商:NXP 功能描述:74LV Series 3.3 V 3-State 8-Stage Shift-and-Store Bus Register SMT - SOIC-16 |
| 74LV4094D118 | 制造商:NXP 功能描述: 制造商:NXP Semiconductors 功能描述: |
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