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參數(shù)資料
| 型號(hào)： | 74LV4040 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 通用總線功能 |
| 英文描述： | 12-stage binary ripple counter |
| 中文描述： | 12位的二進(jìn)制紋波計(jì)數(shù)器 |
| 文件頁數(shù)： | 2/14頁 |
| 文件大?。?/td> | 133K |
| 代理商： | 74LV4040 |
Philips Semiconductors
Product specification
74LV4040
12-stage binary ripple counter
2
1998 Jun 23
853-2075 19619
FEATURES
Optimized for Low Voltage applications: 1.0 to 5.5V
Accepts TTL input levels between V
CC
= 2.7V and V
CC
= 3.6V
Typical V
OLP
(output ground bounce)
T
amb
= 25
°
C
Typical V
OHV
(output V
OH
undershoot)
T
amb
= 25
°
C
Frequency dividing circuits
Time delay circuits
Control counters
Output capability: standard
I
CC
category: MSI
0.8V @ V
CC
= 3.3V,
2V @ V
CC
= 3.3V,
DESCRIPTION
The 74LV4040 is a low–voltage Si–gate CMOS device and is pin
and function compatible with 74HC/HCT4040.
The 74LV4040 is a 12-stage binary ripple counter with a click input
(CP), an overriding asynchronous master reset input (MR) and
twelve fully buffered parallel outputs (Q
0
to Q
11
). The counter is
advanced on the HIGH-to-LOW transition of CP. A HIGH on MR
clears all counter stages and forces all outputs LOW, independent of
the state of CP.
Each counter stage is a static toggle flip-flop.
QUICK REFERENCE DATA
GND = 0V; T
amb
= 25
°
C; t
r
=t
f
SYMBOL
2.5 ns
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
CP to Q
0
Q
n
to Q
n+1
MR to Q
n
Maximum clock frequency
C
L
= 15pF
V
CC
= 3.3V
12
7
16
ns
f
max
C
I
C
PD
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W)
P
D
= C
PD
V
CC2
x f
i
(C
L
f
i
= input frequency in MHz; C
L
= output load capacity in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
(C
L
V
CC2
f
o
) = sum of the outputs.
2. The condition is V
I
= GND to V
CC
100
MHz
Input capacitance
3.5
pF
Power dissipation capacitance per gate
Notes 1 and 2
30
pF
V
CC2
f
o
) where:
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
16-Pin Plastic DIL
–40
°
C to +125
°
C
74LV4040 N
74LV4040 N
SOT38-4
16-Pin Plastic SO
–40
°
C to +125
°
C
74LV4040 D
74LV4040 D
SOT109-1
16-Pin Plastic SSOP Type II
–40
°
C to +125
°
C
74LV4040 DB
74LV4040 DB
SOT338-1
16-Pin Plastic TSSOP Type I
–40
°
C to +125
°
C
74LV4040 PW
74LV4040PW DH
SOT403-1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74LV4040D | 12-stage binary ripple counter |
| 74LV4040DB | 12-stage binary ripple counter |
| 74LV4040N | 12-stage binary ripple counter |
| 74LV4051 | 8-channel analog multiplexer/demultiplexer(八通道模擬多路復(fù)用器/多路分解器) |
| 74LV4051PWDH | 8-channel analog multiplexer/demultiplexer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74LV4040A | 制造商:TI 制造商全稱:Texas Instruments 功能描述:12-BIT ASYNCHRONOUS BINARY COUNTERS |
| 74LV4040D | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:12-stage binary ripple counter |
| 74LV4040DB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:12-stage binary ripple counter |
| 74LV4040DB-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Asynchronous Up Counter |
| 74LV4040D-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Asynchronous Up Counter |
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