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參數(shù)資料
| 型號(hào)： | 74LV20 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Dual 4-input NAND gate |
| 中文描述： | 雙4輸入與非門 |
| 文件頁(yè)數(shù)： | 6/12頁(yè) |
| 文件大?。?/td> | 114K |
| 代理商： | 74LV20 |
Philips Semiconductors
Product specification
74LV20
Dual 4-input NAND gate
1998 Apr 20
6
AC WAVEFORMS
V
M
= 1.5V at V
CC
V
M
= 0.5V * V
CC
at V
CC
V
OL
and V
OH
are the typical output voltage drop that occur with the
output load.
2.7V
3.6V
2.7V
V
I
nA, nB, nC, nD
INPUT
GND
V
OH
nY OUTPUT
V
OL
V
M
t
PHL
t
PLH
SV00364
V
M
Figure 1.Input (nA, nB, nC, nD) to
output (nY) propagation delays.
TEST CIRCUIT
PULSE
GENERATOR
R
T
V
I
D.U.T.
V
O
C
L
R
L
= 1k
V
CC
Test Circuit for switching times
DEFINITIONS
R
L
= Load resistor
C
L
= Load capacitance includes jig and probe capacitance
V
CC
V
I
< 2.7V
V
CC
TEST
t
PLH/
t
PHL
R
T
= Termination resistance should be equal to Z
OUT
of pulse generators.
50pF
SV00901
2.7–3.6V
2.7V
Figure 2. Load circuitry for switching times
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74LV20D | Dual 4-input NAND gate |
| 74LV20N | Dual 4-input NAND gate |
| 74LV240 | Octal buffer/line driver; inverting (3-State)(反相, 八緩沖器/線驅(qū)動(dòng)器(三態(tài)）) |
| 74LV240D | Octal buffer/line driver; inverting 3-State |
| 74LV240DB | Octal buffer/line driver; inverting 3-State |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74LV20D | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual 4-input NAND gate |
| 74LV20DB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual 4-input NAND gate |
| 74LV20DB-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Dual 4-input NAND Gate |
| 74LV20D-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Dual 4-input NAND Gate |
| 74LV20N | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual 4-input NAND gate |
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