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參數(shù)資料
| 型號： | 74LV157 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Quad 2-input multiplexer |
| 中文描述： | 四2輸入復(fù)用器 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 117K |
| 代理商： | 74LV157 |
Philips Semiconductors
Product specification
74LV157
Quad 2-input multiplexer
2
1998 Apr 30
853–1920 19318
FEATURES
Optimized for low voltage applications: 1.0 to 3.6 V
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
Typical V
OLP
(output ground bounce) < 0.8 V at V
CC
= 3.3 V,
T
amb
= 25
°
C
Typical V
OHV
(output V
OH
undershoot) > 2 V at V
CC
= 3.3 V,
T
amb
= 25
°
C
Output capability: standard
I
CC
category: MSI
DESCRIPTION
The 74LV157 is a low-voltage CMOS device and is pin and function
compatible with 74HC/HCT157.
The 74LV157 is a quad 2-input multiplexer which selects 4 bits of data
from two sources under the control of a common data select input (S).
The four outputs present the selected data in the true (non-inverted)
form. The enable input (E) is active LOW. When E is HIGH, all of the
outputs (1Y to 4Y) are forced LOW regardless of all other input
conditions.
Moving the data from two groups of registers to four common output
buses is a common use of the 74LV157. The state of the common
data select input (S) determines the particular register from which
the data comes. It can also be used as function generator.
The device is useful for implementing highly irregular logic by
generating any four of the 16 different functions of two variables with
one variable common.
The 74LV157 is the logic implementation of a 4-pole, 2-position
switch, where the position of the switch is determined by the logic
levels applied to S.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
≤
2.5 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
nl
0
, nl
1
, to nY
E to nY
S to nY
C
L
= 15 pF;
V
CC
= 3.3 V
10
11
12
ns
C
I
C
PD
Input capacitance
3.5
pF
Power dissipation capacitance per gate
V
I
= GND to V
CC1
70
pF
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W)
P
D
= C
PD
×
V
CC2
×
f
i
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacitance in pF;
f
o
= output frequency in MHz; V
= supply voltage in V;
(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
16-Pin Plastic DIL
–40
°
C to +125
°
C
74LV157 N
74LV157 N
SOT38-4
16-Pin Plastic SO
–40
°
C to +125
°
C
74LV157 D
74LV157 D
SOT109-1
16-Pin Plastic SSOP Type II
–40
°
C to +125
°
C
74LV157 DB
74LV157 DB
SOT338-1
16-Pin Plastic TSSOP Type I
–40
°
C to +125
°
C
74LV157 PW
74LV157PW DH
SOT403-1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74LV157D | Quad 2-input multiplexer |
| 74LV157N | Quad 2-input multiplexer |
| 74LV161DB | Presettable synchronous 4-bit binary counter; asynchronous reset |
| 74LV161 | Presettable synchronous 4-bit binary counter; asynchronous reset |
| 74LV161D | Presettable synchronous 4-bit binary counter; asynchronous reset |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74LV157D | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Quad 2-input multiplexer |
| 74LV157DB | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Quad 2-input multiplexer |
| 74LV157DB-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2-Input Digital Multiplexer |
| 74LV157D-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2-Input Digital Multiplexer |
| 74LV157N | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Quad 2-input multiplexer |
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