
Philips Semiconductors
Product specification
74LV154
4-to-16 line decoder/demultiplexer
2
1998 Apr 28
853–1939 19309
FEATURES
Optimized for low voltage applications: 1.0 to 3.6 V
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
Typical V
OLP
(output ground bounce) < 0.8 V at V
CC
= 3.3 V,
T
amb
= 25
°
C
Typical V
OHV
(output V
OH
undershoot) > 2 V at V
CC
= 3.3 V,
T
amb
= 25
°
C
16-line demultiplexing capability
Decodes 4 binary-coded inputs into one of 16 mutually
exclusive outputs
2-input enable gate for strobing or expansion
Output capability: standard
I
CC
category: MSI
DESCRIPTION
The 74LV154 is a low-voltage CMOS device and is pin and function
compatible with 74HC/HCT154.
The 74LV154 decoders accept four active HIGH binary address
inputs (A
0
to A
3
) and provide 16 mutually exclusive active LOW
outputs(Y
0
to Y
15
).
The 2-input enable inputs (E
0
, E
1)
can be used to strobe the
decoder to eliminate the normal decoding “glitches” on the outputs,
or it can be used for expansion of the decoder.
The enable input has two AND’ed inputs which must be LOW to
enable the outputs.
The 74LV154 can be used as a 1-to-16 demultiplexer by using one
of the enable inputs as the multiplexed data input.
When the other enable is LOW, the addressed output will follow the
state of the applied data.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
≤
2.5 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
A
n
, E
n
to Y
n
Input capacitance
C
L
= 15 pF;
V
CC
= 3.3 V
11
3.5
ns
C
I
C
PD
pF
Power dissipation capacitance per gate
V
I
= GND to V
CC1
60
pF
NOTE:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W)
P
D
= C
PD
×
V
CC2
×
f
i
+
Σ
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacitance in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
Σ
(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
–40
°
C to +125
°
C
–40
°
C to +125
°
C
–40
°
C to +125
°
C
–40
°
C to +125
°
C
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
24-Pin Plastic DIL
74LV154 N
74LV154 N
SOT101-1
24-Pin Plastic SO
74LV154 D
74LV154 D
SOT137-1
24-Pin Plastic SSOP Type II
74LV154 DB
74LV154 DB
SOT340-1
24-Pin Plastic TSSOP Type I
74LV154 PW
74LV154PW DH
SOT355-1
PIN CONFIGURATION
SV00544
1
2
3
4
5
6
7
8
9
10
11
12
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10
GND
VCC
A0
A1
A2
A3
E1
E0
Y15
Y14
Y13
Y12
Y11
24
23
22
21
20
19
18
17
16
15
14
13
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
1, 2, 3, 4, 5, 6, 7,
8, 9, 10, 11, 13,
14, 15, 16, 17
Y
0
to Y
15
Outputs (active LOW)
18, 19
E
0
, E
1
GND
Enable inputs (active LOW)
12
Ground (0 V)
23, 22, 21, 20
A
0
to A
3
V
CC
Address inputs
16
Positive supply voltage