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參數(shù)資料
| 型號(hào)： | 74LV125 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Quad buffer/line driver 3-State |
| 中文描述： | 四緩沖器/線路驅(qū)動(dòng)器三態(tài) |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 111K |
| 代理商： | 74LV125 |
Philips Semiconductors
Product specification
74LV125
Quad buffer/line driver (3-State)
2
1998 Apr 28
853–1901 19290
FEATURES
Wide operating voltage: 1.0 to 5.5 V
Optimized for Low Voltage applications: 1.0 to 3.6 V
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
Typical V
OLP
(output ground bounce) < 0.8 V at V
CC
= 3.3 V,
T
amb
= 25
°
C.
Typical V
OHV
(output V
OH
undershoot) > 2 V at V
CC
= 3.3 V,
T
amb
= 25
°
C.
Output capability: bus driver
I
CC
category: MSI
DESCRIPTION
The 74LV125 is a low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT125.
The 74LV125 consists of four non-inverting buffers/line drivers with
3-state outputs. The 3-state outputs (nY) are controlled by the output
enable input (nOE). A HIGH at nOE causes the outputs to assume a
high impedance OFF-state.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
≤
2.5 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
nA to nY
C
L
= 15 pF;
V
CC
= 3.3 V
9
ns
C
I
Input capacitance
3.5
pF
C
PD
Power dissipation capacitance per buffer
V
CC
= 3.3 V;
V
I
CC1
22
pF
NOTE:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W)
P
D
= C
PD
×
V
CC2
×
f
i
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacitance in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
14-Pin Plastic DIL
–40
°
C to +125
°
C
74LV125 N
74LV125 N
SOT27-1
14-Pin Plastic SO
–40
°
C to +125
°
C
74LV125 D
74LV125 D
SOT108-1
14-Pin Plastic SSOP Type II
–40
°
C to +125
°
C
74LV125 DB
74LV125 DB
SOT337-1
14-Pin Plastic TSSOP Type I
–40
°
C to +125
°
C
74LV125 PW
74LV125PW DH
SOT402-1
PIN DESCRIPTION
PIN
NUMBER
1, 4, 10, 13
2, 5, 9, 12
3, 6, 8, 11
7
14
SYMBOL
NAME AND FUNCTION
1OE – 4OE
1A – 4A
1Y – 4Y
GND
V
CC
Data enable inputs (active LOW)
Data inputs
Data Outputs
Ground (0 V)
Positive supply voltage
FUNCTION TABLE
INPUTS
OUTPUT
nY
nOE
nA
L
L
H
L
H
X
L
H
Z
NOTES:
H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74LV125PWDH | Quad buffer/line driver 3-State |
| 74LV126DB | Quad buffer/line driver 3-State |
| 74LV126PW | Quad buffer/line driver 3-State |
| 74LV126 | Quad buffer/line driver 3-State |
| 74LV126D | Quad buffer/line driver 3-State |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74LV125A | 制造商:TI 制造商全稱:Texas Instruments 功能描述:QUADRUPLE BUS BUFFER GATES |
| 74LV125ATELL-E | 制造商:Renesas Electronics Corporation 功能描述:Buffer/Line Driver 4-CH Non-Inverting 3-ST CMOS 14-Pin TSSOP T/R Cut Tape |
| 74LV125D | 功能描述:緩沖器和線路驅(qū)動(dòng)器 QUAD BUFR/DRVR OE ACTIVE LOW RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| 74LV125D,112 | 功能描述:緩沖器和線路驅(qū)動(dòng)器 QUAD BUFR/DRVR OE RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| 74LV125D,118 | 功能描述:緩沖器和線路驅(qū)動(dòng)器 QUAD BUFR/DRVR OE RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
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