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參數資料
| 型號： | 74LV11PWDH |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | Triple 3-input AND gate |
| 中文描述： | LV/LV-A/LVX/H SERIES, TRIPLE 3-INPUT AND GATE, PDSO14 |
| 封裝： | PLASTIC, TSSOP-14 |
| 文件頁數： | 3/10頁 |
| 文件大小： | 113K |
| 代理商： | 74LV11PWDH |
Philips Semiconductors
Product specification
74LV11
Triple 3-input AND gate
1998 Apr 20
3
PIN CONFIGURATION
SV00416
1
2
3
4
5
6
7
1A
1B
2A
2B
2C
2Y
GND
VCC
1C
1Y
3C
3B
3A
3Y
14
13
12
11
10
9
8
LOGIC SYMBOL (IEEE/IEC)
SV00439
5
1
2
12
4
6
8
9
10
11
13
&
&
&
3
LOGIC SYMBOL
SV00438
1C
1A
13
1
1B
2
2C
2A
2B
5
3
4
3C
3A
3B
11
9
10
2Y
3Y
6
8
12
1Y
LOGIC DIAGRAM (ONE GATE)
SV00421
A
B
C
Y
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
CC
DC supply voltage
V
I
Input voltage
V
O
Output voltage
PARAMETER
CONDITIONS
See Note 1
MIN
1.0
0
0
–40
–40
–
–
–
TYP
3.3
–
–
MAX
3.6
V
CC
V
CC
+85
+125
500
200
100
UNIT
V
V
V
T
amb
Operating ambient temperature range in free air
See DC and AC
characteristics
V
CC
= 1.0V to 2.0V
V
CC
= 2.0V to 2.7V
V
CC
= 2.7V to 3.6V
°
C
t
r
, t
f
Input rise and fall times
–
–
–
ns/V
NOTE:
1. The LV is guaranteed to function down to V
CC
= 1.0V (input levels GND or V
CC
); DC characteristics are guaranteed from V
CC
= 1.2V to V
CC
= 3.6V.
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