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參數(shù)資料
| 型號： | 74LV10 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Triple 3-input NAND gate |
| 中文描述： | 三3輸入與非門 |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 113K |
| 代理商： | 74LV10 |
Philips Semiconductors
Product specification
74LV10
Triple 3-input NAND gate
1998 Apr 20
5
DC ELECTRICAL CHARACTERISTICS (Continued)
Over recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
-40
°
C to +85
°
C
TYP
1
-40
°
C to +125
°
C
MIN
UNIT
MIN
MAX
MAX
I
CC
Additional
quiescent supply
current per input
V
CC
= 2.7 V to 3.6 V; V
I
= V
CC
– 0.6 V
500
850
μ
A
NOTE:
1. All typical values are measured at T
amb
= 25
°
C.
AC CHARACTERISTICS
GND = 0V; t
r
= t
f
≤
2.5ns; C
L
= 50pF; R
L
= 1K
CONDITION
LIMITS
SYMBOL
PARAMETER
WAVEFORM
–40 to +85
°
C
TYP
1
–40 to +125
°
C
MIN
UNIT
V
CC
(V)
1.2
MIN
MAX
MAX
55
t
PHL/PLH
Propagation delay
nA, nB, nC to nY
Figure 1 2
Figure 1, 2
2.0
19
36
44
ns
y
2.7
14
10
2
26
33
3.0 to 3.6
21
26
NOTES:
1. Unless otherwise stated, all typical values are measured at T
amb
= 25
°
C.
2. Typical values are measured at V
CC
= 3.3 V.
AC WAVEFORMS
V
M
= 1.5 V at V
CC
≥
2.7 V;
V
M
= 0.5
×
V
CC
at V
CC
<
2.7 V;
V
OL
and V
OH
are the typical output voltage drop that occur with the
output load.
SV00420
VM
nA, nB, nC
INPUT
nY OUTPUT
VM
tPLH
tPHL
GND
VI
VOL
VOH
Figure 1. Input (nA, nB, nC) to output (nY) propagation delays.
TEST CIRCUIT
PULSE
GENERATOR
R
T
V
I
D.U.T.
V
O
C
L
R
L
= 1k
V
CC
Test Circuit for switching times
DEFINITIONS
R
L
= Load resistor
C
L
= Load capacitance includes jig and probe capacitance
V
CC
V
I
< 2.7V
V
CC
TEST
t
PLH/
t
PHL
R
T
= Termination resistance should be equal to Z
OUT
of pulse generators.
50pF
SV00901
2.7–3.6V
2.7V
Figure 2. Load circuitry for switching times.
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