
Philips Semiconductors
Product specification
74LV04
Hex inverter
2
1998 Apr 20
853–1900 19257
FEATURES
Wide operating voltage: 1.0 to 5.5 V
Optimized for low voltage applications: 1.0 to 3.6 V
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
Typical V
OLP
(output ground bounce) < 0.8 V at V
CC
= 3.3 V,
T
amb
= 25
°
C
Typical V
OHV
(output V
OH
undershoot) > 2 V at V
CC
= 3.3 V,
T
amb
= 25
°
C
Output capability: standard
I
CC
category: SSI
DESCRIPTION
The 74LV04 is a low-voltage Si-gate CMOS device that is pin and
function compatible with 74HC/HCT04.
The 74LV04 provides six inverting buffers.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
SYMBOL
2.5 ns
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
nA to nY
C
L
= 15 pF;
V
CC
= 3.3 V
6
ns
C
I
C
PD
Input capacitance
3.5
pF
Power dissipation capacitance per gate
See Notes NO TAG and 2
21
pF
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W)
P
D
= C
PD
V
CC2
f
i
(C
L
f
i
= input frequency in MHz; C
L
= output load capacitance in pF;
f
o
= output frequency in MHz; V
= supply voltage in V;
(C
L
V
CC2
f
o
) = sum of the outputs.
2. The condition is V
1
is V
1
= GND to V
CC.
V
CC2
f
o
) where:
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
14-Pin Plastic DIL
–40
°
C to +125
°
C
74LV04 N
74LV04 N
SOT27-1
14-Pin Plastic SO
–40
°
C to +125
°
C
74LV04 D
74LV04 D
SOT108-1
14-Pin Plastic SSOP Type II
–40
°
C to +125
°
C
74LV04 DB
74LV04 DB
SOT337-1
14-Pin Plastic TSSOP Type I
–40
°
C to +125
°
C
74LV04 PW
74LV04PW DH
SOT402-1
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
1, 3, 5, 9, 11, 13
1A – 6A
Data inputs
2, 4, 6, 8, 10, 12
1Y – 6Y
Data outputs
7
GND
Ground (0 V)
14
V
CC
Positive supply voltage
FUNCTION TABLE
INPUTS
OUTPUTS
nA
nY
L
H
H
L
NOTES:
H =HIGH voltage level
L
=LOW voltage level