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參數(shù)資料
| 型號： | 74LV00 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Quad 2-input NAND gate |
| 中文描述： | 四2輸入與非門 |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 104K |
| 代理商： | 74LV00 |
Philips Semiconductors
Product specification
74LV00
Quad 2-input NAND gate
1998 Apr 20
5
DC ELECTRICAL CHARACTERISTICS (Continued)
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
-40
°
C to +85
°
C
TYP
1
-40
°
C to +125
°
C
MIN
UNIT
MIN
MAX
MAX
I
I
Input leakage
current
Quiescent supply
current; SSI
Additional
quiescent supply
current
V
CC
= 5.5V; V
I
= V
CC
or GND
1.0
1.0
μ
A
I
CC
V
CC
= 5.5V; V
I
= V
CC
or GND; I
O
= 0
20.0
40
μ
A
I
CC
V
CC
= 2.7V to 3.6V; V
I
= V
CC
–0.6V
500
850
μ
A
NOTE:
1. All typical values are measured at T
amb
= 25
°
C.
AC CHARACTERISTICS
GND = 0V; t
r
= t
f
≤
2.5ns; C
L
= 50pF; R
L
= 1K
CONDITION
LIMITS
SYMBOL
PARAMETER
WAVEFORM
–40 to +85
°
C
TYP
1
45
15
11
9
2
6.5
3
–40 to +125
°
C
MIN
UNIT
V
CC
(V)
1.2
2.0
2.7
3.0 to 3.6
4.5 to 5.5
MIN
MAX
MAX
Propagation delay
nA, nB to nY
26
18
15
11
31
23
18
14
t
PHL/PLH
Figures 1, 2
ns
NOTES:
1. Unless otherwise stated, all typical values are measured at T
amb
= 25
°
C.
2. Typical values are measured at V
CC
= 3.3 V.
3. Typical values are measured at V
CC
= 5.0 V.
AC WAVEFORMS
V
M
= 1.5 V at V
CC
≥
2.7 V and
≤
3.6 V;
V
M
= 0.5
×
V
CC
at V
CC
<
2.7 V and
≥
4.5 V;
V
OL
and V
OH
are the typical output voltage drop that occur with the
output load.
V
I
nA, nB INPUT
GND
V
OH
nY OUTPUT
V
OL
V
M
t
PHL
t
PLH
V
M
SV00377
Figure 1. Input (nA, nB) to output (nY) propagation delays.
TEST CIRCUIT
PULSE
GENERATOR
R
T
V
l
D.U.T.
V
O
C
L
R
L
= 1k
V
cc
Test Circuit for Outputs
DEFINITIONS
R
L
= Load resistor
C
L
= Load capacitance includes jig and probe capacitiance
R
T
= Termination resistance should be equal to Z
OUT
of pulse generators.
V
CC
V
I
< 2.7V
2.7–3.6V
V
CC
2.7V
TEST
t
PLH/
t
PHL
≥
4.5 V
V
CC
50pF
SV00902
Figure 2. Load circuitry for switching times.
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