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參數(shù)資料
| 型號(hào)： | 74LS85 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | 4-Bit Magnitude Comparator |
| 中文描述： | 4位數(shù)值比較 |
| 文件頁(yè)數(shù)： | 4/8頁(yè) |
| 文件大?。?/td> | 133K |
| 代理商： | 74LS85 |
NOTE:
The SN74LS85 can be used as a 5-bit comparator only
when the outputs are used to drive the A
–A
and B
–B
3
inputs of another SN74LS85 as shown in Figure 2 in posi-
tions #1, 2, 3, and 4.
SN74LS85
http://onsemi.com
4
Figure 1. Comparing Two n-Bit Words
L = LOW LEVEL
H = HIGH LEVEL
A
0
A
1
A
2
A
3
B
0
B
1
B
2
B
3
A
0
A
1
A
2
A
3
B
0
B
1
B
2
I
A > B
I
A < B
I
A = B
B
3
A
0
A
1
A
2
A
3
B
0
B
1
B
2
I
A > B
I
A < B
I
A = B
B
3
L
L
H
O
A > B
O
A < B
O
A = B
O
A > B
O
A < B
O
A = B
A > B
A < B
A = B
SN74LS85
SN74LS85
An
An
An
An
Bn
Bn
Bn
Bn
APPLICATIONS
Figure 2 shows a high speed method of comparing two
24-bit words with only two levels of device delay. With the
technique shown in Figure 1, six levels of device delay result
when comparing two 24-bit words. The parallel technique
can be expanded to any number of bits, see Table 1.
Table 1
WORD LENGTH
NUMBER OF PKGS.
1–4 Bits
5–24 Bits
25–120 Bits
1
2–6
8–31
MSB = MOST SIGNIFICANT BIT
LSB = LEAST SIGNIFICANT BIT
L = LOW LEVEL
H = HIGH LEVEL
NC = NO CONNECTION
A
0
A
1
A
2
A
3
B
0
B
1
B
2
B
3
A
0
A
1
A
2
A
3
B
0
B
1
B
2
B
3
I
A > B
I
A < B
#5
L
L
H
I
A = B
O
A > B
O
A < B
O
A = B
(LSB)
INPUTS
A
0
A
1
A
2
A
3
B
0
B
1
B
2
B
3
I
A > B
I
A < B
#1
I
A = B
O
A > B
O
A < B
O
A = B
L
NC
A
20
A
21
B
23
B
22
B
21
B
20
A
23
A
22
A
19
B
19
(MSB)
A
5
A
6
A
7
A
8
B
5
B
6
B
7
B
8
A
0
A
1
A
2
A
3
B
0
B
1
B
2
B
3
I
A > B
I
A < B
I
A = B
O
A > B
O
A < B
O
A = B
#4
NC
L
A
4
B
4
A
0
A
1
A
2
A
3
B
0
B
1
B
2
B
3
I
A > B
I
A < B
I
A = B
O
A > B
O
A < B
O
A = B
#3
NC
L
A
9
B
9
A
10
A
11
B
13
B
12
B
11
B
10
A
13
A
12
A
0
A
1
A
2
A
3
B
0
B
1
B
2
B
3
I
A > B
I
A < B
I
A = B
O
A > B
O
A < B
O
A = B
#2
NC
L
A
14
B
14
A
15
A
16
B
18
B
17
B
16
B
15
A
18
A
17
OUTPUTS
A
0
A
1
A
2
A
3
B
0
B
1
B
2
B
3
I
I
A < B
I
A = B
O
A > B
O
A < B
O
A = B
#6
INPUTS
Figure 2. Comparison of Two 24-Bit Words
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