
CONNECTION DIAGRAMS DIP
(TOP VIEW)
18
17
16
15
14
13
1
2
3
4
A3
5
6
7
A6
20
19
8
A7
VCC
DIR
B1
B2
B3
B5
B4
B6
A1
A2
A4
A5
9
10
GND
A8
12
11
B7
B8
18
17
16
15
14
13
1
2
3
4
A3
5
6
7
A6
20
19
8
A7
VCC
DIR
B1
B2
B3
B5
B4
B6
A1
A2
A4
A5
9
10
GND
A8
12
11
B7
B8
SN54/74LS640
SN54/74LS642
SN54/74LS641
SN54/74LS645
ENABLE
G
ENABLE
G
5-1
FAST AND LS TTL DATA
OCTAL BUS TRANSCEIVERS
These octal bus transceivers are designed for asynchronous two-way
communication between data buses. Control function implementation
minimizes external timing requirements. These circuits allow data transmis-
sion from the A bus to B or from the B bus to A bus depending upon the logic
level of the direction control (DIR) input. Enable input (G) can disable the
device so that the buses are effectively isolated.
DEVICE
LS640
LS641
LS642
LS645
OUTPUT
3-State
Open-Collector
Open-Collector
3-State
LOGIC
Inverting
True
Inverting
True
FUNCTION TABLE
CONTROL
INPUTS
OPERATION
LS640
LS642
LS641
LS645
G
DIR
L
L
B data to A bus
B data to A bus
L
H
A data to B bus
A data to B bus
H
X
Isolation
Isolation
H = HIGH Level, L = LOW Level, X = Irrelevant
SN54/74LS640
SN54/74LS641
SN54/74LS642
SN54/74LS645
OCTAL BUS TRANSCEIVERS
LOW POWER SCHOTTKY
ORDERING INFORMATION
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXDW SOIC
Ceramic
Plastic
20
1
J SUFFIX
CERAMIC
CASE 732-03
20
1
N SUFFIX
PLASTIC
CASE 738-03
20
1
DW SUFFIX
SOIC
CASE 751D-03