參數(shù)資料
型號(hào): 74LCX257SJX
廠商: Fairchild Semiconductor
文件頁(yè)數(shù): 2/9頁(yè)
文件大小: 0K
描述: MULTIPLEXER QUAD 2IN LV 16SOP
標(biāo)準(zhǔn)包裝: 2,000
系列: 74LCX
類型: 多路復(fù)用器
電路: 4 x 2:1
獨(dú)立電路: 1
輸出電流高,低: 24mA,24mA
電壓電源: 單電源
電源電壓: 2 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOP
包裝: 帶卷 (TR)
www.fairchildsemi.com
2
74LCX257
Functional Description
The LCX257 is a quad 2-input multiplexer with 3-STATE
outputs. It selects four bits of data from two sources under
control of a Common Data Select input. When the Select
input is LOW, the I0x inputs are selected and when Select
is HIGH, the I1x inputs are selected. The data on the
selected inputs appears at the outputs in true (non
inverted) form. The device is the logic implementation of a
4-pole, 2-position switch where the position of the switch is
determined by the logic levels supplied to the Select input.
The logic equations for the outputs are shown below:
Za = OE (11a S + I0a S)
Zb = OE (11b S + I0b S)
Zc = OE (11c S + I0c S)
Zd = OE (11d S + I0d S)
When the Output Enable (OE) is HIGH, the outputs are
forced to a high impedance state. If the outputs are tied
together, all but one device must be in the high impedance
state to avoid high currents that would exceed the maxi-
mum ratings. Designers should ensure the Output Enable
signals to 3-STATE devices whose outputs are tied
together are designed so there is no overlap.
Truth Table
H
= HIGH Voltage Level
L
= LOW Voltage Level
X
= Immaterial
Z
= High Impedance
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Output
Select
Data
Outputs
Enable
Input
Inputs
OE
SI0
I1
Z
HX
X
Z
LH
X
L
LH
X
H
LL
L
X
L
LL
H
X
H
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