參數(shù)資料
型號(hào): 74HCT74PW,112
廠商: NXP Semiconductors
文件頁數(shù): 15/21頁
文件大?。?/td> 0K
描述: IC DUAL D FF POSEDG TRIG 14TSSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 96
系列: 74HCT
功能: 設(shè)置(預(yù)設(shè))和復(fù)位
類型: D 型
輸出類型: 差分
元件數(shù): 2
每個(gè)元件的位元數(shù): 1
頻率 - 時(shí)鐘: 18MHz
延遲時(shí)間 - 傳輸: 18ns
觸發(fā)器類型: 正邊沿
輸出電流高,低: 4mA,4mA
電源電壓: 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
包裝: 管件
其它名稱: 74HCT74PW
74HCT74PW-ND
935175150112
74HC_HCT74
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 4 — 27 August 2012
3 of 21
NXP Semiconductors
74HC74; 74HCT74
Dual D-type flip-flop with set and reset; positive edge-trigger
5.
Pinning information
5.1 Pinning
5.2 Pin description
(1) This is not a supply pin. The substrate is attached to
this pad using conductive die attach material. There
is no electrical or mechanical requirement to solder
this pad. However, if it is soldered, the solder land
should remain floating or be connected to GND.
Fig 5.
Pin configuration for DIP14, SO14 and (T)SSOP14
Fig 6.
Pin configuration for DHVQFN14
+&
+&7
5'
9&&
'
5'
&3
'
6'
&3
4
6'
4
*1'
4
DDD
DDD
+&
+&7
7UDQVSDUHQW WRS YLHZ
4
6'
&3
'
5'
*1'
*1
'
4
5
'
9
&&
WHUPLQDO
LQGH[DUHD
Table 2.
Pin description
Symbol
Pin
Description
1RD
1
asynchronous reset-direct input (active LOW)
1D
2
data input
1CP
3
clock input (LOW-to-HIGH, edge-triggered)
1SD
4
asynchronous set-direct input (active LOW)
1Q
5
output
1Q
6
complement output
GND
7
ground (0 V)
2Q
8
complement output
2Q
9
output
2SD
10
asynchronous set-direct input (active LOW)
2CP
11
clock input (LOW-to-HIGH, edge-triggered)
2D
12
data input
2RD
13
asynchronous reset-direct input (active LOW)
VCC
14
supply voltage
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