參數(shù)資料
型號: 74HCT4518
廠商: NXP Semiconductors N.V.
元件分類: 通用總線功能
英文描述: Dual synchronous BCD counter
中文描述: 雙同步BCD碼計數(shù)器
文件頁數(shù): 7/7頁
文件大?。?/td> 63K
代理商: 74HCT4518
December 1990
7
Philips Semiconductors
Product specification
Dual synchronous BCD counter
74HC/HCT4518
AC WAVEFORMS
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”
.
Fig.7 Waveforms showing hold and set-up times for nCP
0
to nCP
1
and nCP
1
to nCP
0
.
(1)
HC : V
M
= 50%; V
I
= GND to V
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
Fig.8
Waveforms showing the minimum pulse widths for nCP
0
, nCP
1
and nMR inputs; the removal time for nMR
and the propagation delay for nMR to nQ
n
outputs and the maximum clock pulse frequency.
Conditions:
nCP
= HIGH while nCP
is triggered on a
LOW-to-HIGH transition and nCP
= LOW,
while nCP
1
is triggered on a HIGH-to-LOW transition.
(1)
HC : V
M
= 50%; V
I
= GND to V
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
Fig.9 Waveforms showing the propagation delays for nCP
0
, nCP
1
to nQ
n
outputs and the output transition times.
Conditions:
nCP
= HIGH while nCP
is triggered on a
LOW-to-HIGH transition and nCP
= LOW,
while nCP
1
is triggered on a HIGH-to-LOW transition.
(1)
HC : V
M
= 50%; V
I
= GND to V
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
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