參數(shù)資料
型號: 74HC7080
廠商: NXP Semiconductors N.V.
英文描述: 16-bit even/odd parity generator/checker
中文描述: 16位偶/奇校驗發(fā)生器/檢查
文件頁數(shù): 2/8頁
文件大?。?/td> 52K
代理商: 74HC7080
December 1990
2
Philips Semiconductors
Product specification
16-bit even/odd parity
generator/checker
74HC/HCT7080
FEATURES
Word-length easily expanded by cascading
Generates either even or odd parity for 16-data bits
Output capability: standard
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT7080 are high-speed Si-gate CMOS
devices. They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT7080 are 16-bit parity generators or
checkers commonly used to detect errors in high-speed
data transmission or data retrieval systems.
The even and odd parity output is available for generating
or checking even/odd parity up to 16-bits.
The even/odd parity output (E/O) is HIGH when an even
number of data inputs (I
0
to I
15
) are HIGH and the
cascade/even-odd-changing input (X) is HIGH.
Expansion to larger word sizes is accomplished by
connecting the even/odd parity output (E/O) to the
cascade/even-odd-changing input (X) of the final stage.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
= 6 ns
Notes
1.
C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W):
P
D
= C
PD
×
V
CC2
×
f
i
+ ∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
(C
L
×
V
CC2
×
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
1.5 V
2.
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
t
PHL/
t
PLH
propagation delay
I
n
to E/O
X to E/O
input capacitance
power dissipation capacitance per package
C
L
= 15 pF; V
CC
= 5 V
29
12
3.5
24
32
15
3.5
25
ns
ns
pF
pF
C
I
C
PD
notes 1 and 2
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