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參數(shù)資料
| 型號(hào)： | 74HC640PW |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 總線收發(fā)器 |
| 英文描述： | Octal bus transceiver; 3-state; inverting |
| 中文描述： | HC/UH SERIES, 8-BIT TRANSCEIVER, INVERTED OUTPUT, PDSO20 |
| 文件頁(yè)數(shù)： | 2/6頁(yè) |
| 文件大?。?/td> | 47K |
| 代理商： | 74HC640PW |
March 1988
2
Philips Semiconductors
Product specification
Octal bus transceiver; 3-state; inverting
74HC/HCT640
FEATURES
Octal bidirectional bus interface
Inverting 3-state outputs
Output capability: bus driver
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT640 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT640 are octal transceivers featuring
inverting 3-state bus compatible outputs in both send and
receive directions.
The “640” features an output enable (OE) input for easy
cascading and a send/receive (DIR) for direction control.
OE controls the outputs so that the buses are effectively
isolated. The “640” is similar to the “245” but has inverting
outputs.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
= 6 ns
Notes
1.
C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W):
P
D
= C
PD
×
V
CC2
×
f
i
+
∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
∑
(C
L
×
V
CC2
×
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
1.5 V
2.
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
t
PHL
/
tPLH
propagation delay
A
n
to B
n
;
B
n
to A
n
input capacitance
input/output capacitance
power dissipation capacitance
per transceiver
C
L
= 15 pF; V
CC
= 5 V
9
9
ns
C
I
C
I/O
C
PD
3.5
10
35
3.5
10
35
pF
pF
pF
notes 1 and 2
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