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參數(shù)資料
| 型號： | 74HC40103N,652 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 1/25頁 |
| 文件大小： | 0K |
| 描述： | IC COUNTER 8BIT SYNC BIN 16DIP |
| 產(chǎn)品培訓(xùn)模塊： | Logic Packages |
| 標(biāo)準(zhǔn)包裝： | 25 |
| 系列： | 74HC |
| 邏輯類型： | 二進(jìn)制計(jì)數(shù)器 |
| 方向： | 下 |
| 元件數(shù)： | 1 |
| 每個元件的位元數(shù)： | 8 |
| 復(fù)位： | 異步 |
| 計(jì)時： | 同步 |
| 計(jì)數(shù)速率： | 32MHz |
| 觸發(fā)器類型： | 正邊沿 |
| 電源電壓： | 2 V ~ 6 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 16-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 16-DIP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 835 (CN2011-ZH PDF) |
| 其它名稱： | 568-1445-5 74HC40103N 933669640652 |
1.
General description
The 74HC40103 is a high-speed Si-gate CMOS device and are pin compatible with the
40103 of the 4000B series. The 74HC40103 is specied in compliance with JEDEC
standard no. 7A.
The 74HC40103 consists of an 8-bit synchronous down counter with a single output which
is active when the internal count is zero. The 74HC40103 contains a single 8-bit binary
counter and has control inputs for enabling or disabling the clock (CP), for clearing the
counter to its maximum count and for presetting the counter either synchronously or
asynchronously. All control inputs and the terminal count output (TC) are active-LOW
logic.
In normal operation, the counter is decremented by one count on each positive-going
transition of the clock (CP). Counting is inhibited when the terminal enable input (TE) is
HIGH. The terminal count output (TC) goes LOW when the count reaches zero if TE is
LOW, and remains LOW for one full clock period.
When the synchronous preset enable input (PE) is LOW, data at the jam input (P0 to P7)
is clocked into the counter on the next positive-going clock transition regardless of the
state of TE. When the asynchronous preset enable input (PL) is LOW, data at the jam
input (P0 to P7) is asynchronously forced into the counter regardless of the state of PE,
TE, or CP. The jam inputs (P0 to P7) represent a single 8-bit binary word.
When the master reset input (MR) is LOW, the counter is asynchronously cleared to its
maximum count (decimal 255) regardless of the state of any other input.
If all control inputs except TE are HIGH at the time of zero count, the counters will jump to
the maximum count, giving a counting sequence of 256 clock pulses long.
The 74HC40103 may be cascaded using the TE input and the TC output, in either a
synchronous or ripple mode.
74HC40103
8-bit synchronous binary down counter
Rev. 03 — 12 November 2004
Product data sheet
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74HC40103PW | 功能描述:計(jì)數(shù)器 IC 8-BIT SYNC BINARY DOWN COUNTER RoHS:否 制造商:NXP Semiconductors 計(jì)數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計(jì)數(shù)法: 計(jì)數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| 74HC40103PW,112 | 功能描述:計(jì)數(shù)器 IC 8-BIT SYNC BINARY RoHS:否 制造商:NXP Semiconductors 計(jì)數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計(jì)數(shù)法: 計(jì)數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| 74HC40103PW,118 | 功能描述:計(jì)數(shù)器 IC 8-BIT SYNC BINARY RoHS:否 制造商:NXP Semiconductors 計(jì)數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計(jì)數(shù)法: 計(jì)數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| 74HC40103PW-T | 功能描述:計(jì)數(shù)器 IC 8-BIT SYNC BINARY DOWN COUNTER RoHS:否 制造商:NXP Semiconductors 計(jì)數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計(jì)數(shù)法: 計(jì)數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| 74HC40105D | 功能描述:寄存器 4BX16W FIFO REGISTER RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
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