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參數(shù)資料
| 型號： | 74HC354 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 8-input multiplexer/register with transparent latches; 3-state |
| 中文描述： | 8輸入多路復用器/注冊透明鎖存器，三態(tài) |
| 文件頁數(shù)： | 10/14頁 |
| 文件大小： | 82K |
| 代理商： | 74HC354 |
December 1990
10
Philips Semiconductors
Product specification
8-input multiplexer/register with
transparent latches; 3-state
74HC/HCT354
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
SYMBOL
PARAMETER
T
amb
(
°
C)
UNIT
TEST CONDITIONS
74HCT
V
CC
(V)
WAVEFORMS
+
25
40 to
+
85
40 to
+
125
min.
typ.
max.
min. max.
min.
max.
t
PHL
/ t
PLH
propagation delay
D
n
to Y, Y
propagation delay
E to Y, Y
propagation delay
S
n
to Y, Y
propagation delay
LE to Y, Y
3-state output enable time
OE
n
to Y, Y
3-state output enable time
OE
3
to Y, Y
3-state output disable time
OE
n
to Y, Y
3-state output disable time
OE
3
to Y, Y
output transition time
25
47
59
71
ns
4.5
Fig.7
t
PHL
/ t
PLH
26
54
68
81
ns
4.5
Fig.6
t
PHL
/ t
PLH
30
59
74
89
ns
4.5
Fig.8
t
PHL
/ t
PLH
31
63
79
95
ns
4.5
Fig.9
t
PZH
/ t
PZL
18
34
43
51
ns
4.5
Fig.10
t
PZH
/ t
PZL
18
34
43
51
ns
4.5
Fig.10
t
PHZ
/ t
PLZ
18
33
41
50
ns
4.5
Fig.10
t
PHZ
/ t
PLZ
21
39
49
59
ns
4.5
Fig.10
t
THL
/ t
TLH
5
12
15
18
ns
4.5
Figs 7, 8 and 9
t
W
data enable pulse width E
LOW
latch enable pulse width
LE LOW
set-up time
D
n
to E
set-up time
S
n
to LE
hold time
D
n
to E
hold time
S
n
to LE
16
6
20
24
ns
4.5
Fig.6
t
W
16
6
20
24
ns
4.5
Fig.9
t
su
10
4
13
15
ns
4.5
Fig.11
t
su
10
5
13
15
ns
4.5
Fig.10
t
h
9
0
11
14
ns
4.5
Fig.11
t
h
9
3
11
14
ns
4.5
Fig.10
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 74HC354D | 制造商:NXP Semiconductors 功能描述: |
| 74HC354D-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Input Digital Multiplexer |
| 74HC354N | 制造商:NXP Semiconductors 功能描述: |
| 74HC356 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-input multiplexer/register; 3-state |
| 74HC356D-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Input Digital Multiplexer |
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