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參數(shù)資料
| 型號： | 74HC32A |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | Quad 2−Input OR Gate High−Performance Silicon−Gate CMOS |
| 文件頁數(shù)： | 2/9頁 |
| 文件大?。?/td> | 163K |
| 代理商： | 74HC32A |
MC74HC32A
http://onsemi.com
2
3
Y1
1
A1
PIN 14 = V
CC
PIN 7 = GND
LOGIC DIAGRAM
2
B1
6
Y2
4
A2
5
B2
8
Y3
9
A3
10
B3
11
Y4
12
A4
13
B4
Y = A+B
Pinout: 14
Lead Packages
(Top View)
13
14
12
11
10
9
8
2
1
3
4
5
6
7
V
CC
B4
A4
Y4
B3
A3
Y3
A1
B1
Y1
A2
B2
Y2
GND
L
L
H
H
L
H
L
H
FUNCTION TABLE
Inputs
Output
A
B
L
H
H
H
Y
ORDERING INFORMATION
Device
Package
Shipping
MC74HC32AN
PDIP
14
25 Units / Rail
MC74HC32ANG
PDIP
14
(Pb
Free)
MC74HC32AD
SOIC
14
55 Units / Rail
MC74HC32ADG
SOIC
14
(Pb
Free)
MC74HC32ADR2
SOIC
14
2500 / Tape & Reel
MC74HC32ADR2G
SOIC
14
(Pb
Free)
MC74HC32ADTR2
TSSOP
14*
MC74HC32ADTR2G
TSSOP
14*
MC74HC32AFEL
SOEIAJ
14
2500 / Tape & Reel
MC74HC32AFELG
SOEIAJ
14
(Pb
Free)
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb
Free.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74HC367A | Telecomm/Datacomm |
| 74HC74DG | Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS |
| 74HC74DR2 | Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS |
| 74HC74DR2G | Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS |
| 74HC74DTR2 | Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74HC32ADR2 | 制造商:Motorola Inc 功能描述: |
| 74HC32AN | 制造商:Motorola Inc 功能描述: 制造商:ACG 功能描述: |
| 74HC32AP | 制造商:Toshiba America Electronic Components 功能描述: |
| 74hc32b1 | 制造商:STMicroelectronics 功能描述: |
| 74HC32BQ | 制造商:NXP Semiconductors 功能描述:IC QUAD 2 INPUT OR GATE DHV |
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