參數(shù)資料
型號: 74HC273
廠商: System Logic Semiconductor Co., Ltd.
英文描述: Octal D Flip-Flop with Common Clock and Reset
中文描述: 八路D觸發(fā)器與普通時鐘和復位拖鞋
文件頁數(shù): 7/8頁
文件大?。?/td> 58K
代理商: 74HC273
September 1993
7
Philips Semiconductors
Product specification
Octal D-type flip-flop with reset;
positive-edge trigger
74HC/HCT273
AC WAVEFORMS
Fig.6
Waveforms showing the clock (CP) to output (Q
n
) propagation delays, the clock pulse width output
transition times and the maximum clock pulse frequency.
(1) HC : V
M
= 50%; V
I
= GND to V
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
Fig.7
Waveforms showing the master reset (MR) pulse width, the master reset to output (Q
n
) propagation delays
and the master reset to clock (CP) removal time.
(1) HC : V
M
= 50%; V
I
= GND to V
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
Fig.8 Waveforms showing the data set-up and hold times for the data input (D
n
).
The shaded areas indicate when the input is permitted to
change for predictable output performance.
(1) HC : V
M
= 50%; V
I
= GND to V
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
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