參數(shù)資料
型號: 74HC14A
廠商: ON SEMICONDUCTOR
英文描述: Hex Schmitt−Trigger Inverter High−Performance Silicon−Gate CMOS
文件頁數(shù): 4/10頁
文件大小: 170K
代理商: 74HC14A
MC74HC14A
http://onsemi.com
4
DC CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
V
Guaranteed Limit
Symbol
Parameter
Condition
55 to 25
°
C
85
°
C
125
°
C
Unit
V
T+
max
Maximum Positive
Going Input
Threshold Voltage
(Figure 3)
V
out
= 0.1V
|I
out
|
20 A
2.0
3.0
4.5
6.0
1.50
2.15
3.15
4.20
1.50
2.15
3.15
4.20
1.50
2.15
3.15
4.20
V
V
T+
min
Minimum Positive
Going Input
Threshold Voltage
(Figure 3)
V
out
= 0.1V
|I
out
|
20 A
2.0
3.0
4.5
6.0
1.0
1.5
2.3
3.0
0.95
1.45
2.25
2.95
0.95
1.45
2.25
2.95
V
V
T
max
Maximum Negative
Going Input
Threshold Voltage
(Figure 3)
V
out
= V
CC
0.1V
|I
out
|
20 A
2.0
3.0
4.5
6.0
0.9
1.4
2.0
2.6
0.95
1.45
2.05
2.65
0.95
1.45
2.05
2.65
V
V
T
min
Minimum Negative
Going Input
Threshold Voltage
(Figure 3)
V
out
= V
CC
0.1V
|I
out
|
20 A
2.0
3.0
4.5
6.0
0.3
0.5
0.9
1.2
0.3
0.5
0.9
1.2
0.3
0.5
0.9
1.2
V
V
H
max
Note 2
Maximum Hysteresis Voltage
(Figure 3)
V
out
= 0.1V or V
CC
0.1V
|I
out
|
20 A
2.0
3.0
4.5
6.0
1.20
1.65
2.25
3.00
1.20
1.65
2.25
3.00
1.20
1.65
2.25
3.00
V
V
H
min
Note 2
Minimum Hysteresis Voltage
(Figure 3)
V
out
= 0.1V or V
CC
0.1V
|I
out
|
20 A
2.0
3.0
4.5
6.0
0.20
0.25
0.40
0.50
0.20
0.25
0.40
0.50
0.20
0.25
0.40
0.50
V
V
OH
Minimum High
Level Output
Voltage
V
in
V
T
min
|I
out
|
20 A
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
V
in
V
T
min
|I
out
|
2.4mA
|I
out
|
4.0mA
|I
out
|
5.2mA
3.0
4.5
6.0
2.48
3.98
5.48
2.34
3.84
5.34
2.20
3.70
5.20
V
OL
Maximum Low
Level Output
Voltage
V
in
V
T+
max
|I
out
|
20 A
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
V
in
V
T+
max
|I
out
|
2.4mA
|I
out
|
4.0mA
|I
out
|
5.2mA
3.0
4.5
6.0
0.26
0.26
0.26
0.33
0.33
0.33
0.40
0.40
0.40
I
in
Maximum Input Leakage
Current
V
in
= V
CC
or GND
6.0
±
0.1
±
1.0
±
1.0
A
I
CC
Maximum Quiescent Supply
Current (per Package)
V
in
= V
CC
or GND
I
out
= 0 A
6.0
1.0
10
40
A
1. Information on typical parametric values along with frequency or heavy load considerations can be found in Chapter 2 of the ON
Semiconductor High
Speed CMOS Data Book (DL129/D).
2. V
H
min > (V
T+
min)
(V
T
max); V
H
max = (V
T+
max)
(V
T
min).
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