參數(shù)資料
型號(hào): 74FR240SJ
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Octal Buffer/Line Driver with 3-STATE Outputs
中文描述: FR/FASTR SERIES, DUAL 4-BIT DRIVER, INVERTED OUTPUT, PDSO20
封裝: 5.30 MM, EIAJ TYPE2, SOP-20
文件頁(yè)數(shù): 3/5頁(yè)
文件大?。?/td> 51K
代理商: 74FR240SJ
3
www.fairchildsemi.com
7
AC Electrical Characteristics
Extended AC Electrical Characteristics
Note 3:
This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase,
i.e., all LOW-to-HIGH, HIGH-to-LOW, 3-STATE-to-HIGH, etc.
Note 4:
These specifications guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load. This specification pertains to single output switching only.
Note 5:
Skew is defined as the absolute value of the difference between the actual propagation delays for any two outputs of the same device. The specifi-
cation applies to any outputs switching HIGH-to-LOW, (t
OSHL
), LOW-to-HIGH, (t
OSLH
), or HIGH-to-LOW and/or LOW-to-HIGH, (t
OST
). Specifications guaran-
teed with all outputs switching in phase.
Symbol
Parameter
T
A
=
+
25
°
C
V
CC
=
+
5.0V
C
L
=
50 pF
Typ
3.3
2.9
4.0
T
A
=
0
°
C to
+
70
°
C
V
CC
=
+
5.0V
C
L
=
50 pF
Min
1.0
1.0
2.6
Units
Min
1.0
1.0
2.6
Max
4.7
4.7
7.0
Max
4.7
4.7
7.0
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation Delay
A
n
to B
n
or B
n
to A
n
Output Enable Time
ns
ns
2.6
1.7
1.7
6.3
3.3
2.9
7.0
6.6
6.6
2.6
1.7
1.7
7.0
6.6
6.6
Output Disable Time
ns
Symbol
Parameter
T
A
=
0
°
C to
+
70
°
C
V
CC
=
+
5.0V
C
L
=
50 pF
Eight Outputs Switching
(Note 3)
Min
1.0
T
A
=
0
°
C to
+
70
°
C
V
CC
=
+
5.0V
C
L
=
250 pF
(Note 4)
Units
Max
6.4
Min
2.3
Max
8.3
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
OSHL
(Note 5)
t
OSLH
(Note 5)
Propagation Delay
ns
A
n
to B
n
or B
n
to A
n
Output Enable Time
1.0
2.6
2.6
6.4
7.2
7.2
2.3
8.3
ns
Output Disable Time
1.7
1.7
6.8
6.8
ns
Pin-to-Pin Skew
2.0
ns
for HL Transitions
Pin-to-Pin Skew
for LH Transitions
1.1
ns
t
OST
(Note 5)
Pin-to-Pin Skew
for HL/LH Transitions
3.1
ns
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