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參數(shù)資料
| 型號： | 74F899QC |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | 9-Bit Latchable Transceiver with Parity Generator/Checker |
| 中文描述： | F/FAST SERIES, 9-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PQCC28 |
| 封裝： | 0.450 X 0.450 INCH, MO-047, PLASTIC, LCC-28 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 89K |
| 代理商： | 74F899QC |
1999 Fairchild Semiconductor Corporation
DS010195
www.fairchildsemi.com
February 1989
Revised August 1999
7
74F899
9-Bit Latchable Transceiver
with Parity Generator/Checker
General Description
The 74F899 is a 9-bit to 9-bit parity transceiver with trans-
parent latches. The device can operate as a feed-through
transceiver or it can generate/check parity from the 8-bit
data busses in either direction. It has a guaranteed current
sinking capability of 24 mA at the A-bus and 64 mA at the
B-bus.
The 74F899 features independent latch enables for the
A-to-B direction and the B-to-A direction, a select pin for
ODD/EVEN parity, and separate error signal output pins for
checking parity.
Features
I
Latchable transceiver with output sink of 24 mA at the
A-bus and 64 mA at the B-bus
I
Option to select generate parity and check or
“feed-through” data/parity in directions A-to-B or B-to-A
I
Independent latch enables for A-to-B and B-to-A
directions
I
Select pin for ODD/EVEN parity
I
ERRA and ERRB output pins for parity checking
I
Ability to simultaneously generate and check parity
I
May be used in systems applications in place of the
74F543 and 74F280
I
May be used in system applications in place of the
74F657 and 74F373 (no need to change T/R to check
parity)
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
Pin Assignment for SOIC
Pin Assignment for PCC
Logic Symbol
Order Number
74F899SC
74F899QC
Package Number
M28B
V28A
Package Description
28-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74F899 | 9-Bit Latchable Transceiver with Parity Generator/Checker |
| 74F899SC | 9-Bit Latchable Transceiver with Parity Generator/Checker |
| 74F899SCX | Single 8-bit Bus Transceiver |
| 74FR16540QCX | Dual 8-Bit Buffer/Driver |
| 74FR16540SSCX | SC70/µDFN, Single/Dual Low-Voltage, Low-Power µP Reset Circuits |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74F899QC_Q | 功能描述:總線收發(fā)器 9-Bit Latchable Tran RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74F899QCX | 功能描述:總線收發(fā)器 9-Bit Latchable Tran RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74F899SC | 功能描述:總線收發(fā)器 9-Bit Latchable Tran RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74F899SC_Q | 功能描述:總線收發(fā)器 9-Bit Latchable Tran RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74F899SCX | 功能描述:總線收發(fā)器 9-Bit Latchable Tran RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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