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參數(shù)資料
| 型號(hào)： | 74F777 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Triple bidirectional latched bus transceiver (3-State + open collector)(三通道雙向鎖存總線收發(fā)器（三態(tài)+集電極開(kāi)路）) |
| 中文描述： | 三鎖存總線雙向收發(fā)器（3態(tài)集電極開(kāi)路）（三通道雙向鎖存總線收發(fā)器（三態(tài)集電極開(kāi)路）） |
| 文件頁(yè)數(shù)： | 8/12頁(yè) |
| 文件大?。?/td> | 98K |
| 代理商： | 74F777 |
Philips Semiconductors
Product specification
74F777
Triple bidirectional latched bus transceiver (3–State +
Open Collector)
May 19, 1992
8
V
M
V
M
V
M
t
PHZ
t
PZH
V
OH
-0.3V
0V
OEAn
An
SF00439
Waveform 3. 3-State output enable time to High level and
output disable time from High level
Notes to AC waveforms
For all waveforms, V
M
= 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
V
M
V
M
V
M
t
PLZ
t
PZL
V
OL
+0.3V
SF00440
An
OEAn
Waveform 4. 3-State output enable time to Low level and output
disable time from Low level
TEST CIRCUITS AND WAVEFORMS
t
w
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
NEGATIVE
PULSE
POSITIVE
PULSE
t
w
AMP (V)
low V
low V
t
THL (
t
f
)
INPUT PULSE REQUIREMENTS
rep. rate
t
w
t
TLH
t
THL
2.5ns
1MHz
500ns 2.5ns
Input pulse definition
V
CC
family
A port
D.U.T.
PULSE
GENERATOR
R
L
C
L
R
T
V
IN
V
OUT
Test circuit for 3–State outputs on A port
DEFINITIONS:
R
L
=
C
L
=
R
U
=
C
D
=
R
T
=
Load resistor; see AC electrical characteristics for value.
Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value.
Pull up resistor; see AC electrical characteristics for value.
Load capacitance includes jig and probe capacitance; see AC electrical characteristics for value.
Termination resistance should be equal to Z
OUT
of pulse generators.
t
THL (
t
f
)
t
TLH (
t
r
)
t
TLH (
t
r
)
AMP (V)
amplitude
3.0V
1.5V
V
M
R
L
7.0V
V
CC
D.U.T.
PULSE
GENERATOR
C
D
R
T
V
IN
V
OUT
Test circuit for outputs on B port
R
U
7.0V
1MHz
500ns
B port
2.0V
1.0V
4.0ns
4.0ns
Low V
0.0V
1.0V
SWITCH POSITION
TEST
t
PLZ
, t
PZL
SWITCH
closed
open
All other
SF00431
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