參數(shù)資料
型號: 74F64
廠商: Fairchild Semiconductor Corporation
英文描述: 4-2-3-2-Input AND-OR-Invert Gate
中文描述: 4 - 2 - 3 - 2 -輸入與或-反相門
文件頁數(shù): 5/8頁
文件大?。?/td> 72K
代理商: 74F64
Philips Semiconductors
Product specification
74F64
4-2-3-2-input AND-OR-invert gate
1996 Mar 14
5
AC ELECTRICAL CHARACTERISTICS
LIMITS
TEST
V
CC
= +5.0V
T
amb
= +25
°
C
C
L
= 50pF, R
L
= 500
V
CC
= +5.0V
±
10%
T
amb
= 0
°
C to +70
°
C
C
L
= 50pF, R
L
= 500
SYMBOL
PARAMETER
CONDITION
UNIT
MIN
TYP
MAX
MIN
MAX
t
PLH
t
PHL
Propagation delay
Dn to Q
Waveform 1
2.5
2.0
4.6
3.2
6.0
4.5
2.5
2.0
7.0
5.5
ns
AC WAVEFORMS
For all waveforms, V
M
= 1.5V.
V
M
V
M
V
M
V
M
Q
Dn
t
PHL
t
PLH
SF00098
Waveform 1.
Propagation Delay for Inverting Outputs
TEST CIRCUIT AND WAVEFORM
t
w
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
NEGATIVE
PULSE
POSITIVE
PULSE
t
w
AMP (V)
0V
0V
t
THL (
t
f
)
INPUT PULSE REQUIREMENTS
rep. rate
t
w
t
TLH
2.5ns
t
THL
2.5ns
1MHz
500ns
Input Pulse Definition
V
CC
family
74F
D.U.T.
PULSE
GENERATOR
R
L
C
L
R
T
V
IN
V
OUT
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
R
L
=
Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
Termination resistance should be equal to Z
OUT
of
pulse generators.
C
L
=
R
T
=
t
THL (
t
f
)
t
TLH (
t
r
)
t
TLH (
t
r
)
AMP (V)
amplitude
3.0V
1.5V
V
M
SF00006
相關(guān)PDF資料
PDF描述
74F64PC 4-2-3-2-Input AND-OR-Invert Gate
74F64SC 4-2-3-2-Input AND-OR-Invert Gate
74F64SJ 4-2-3-2-Input AND-OR-Invert Gate
74F651A Transceivers/registers
74F652A Transceivers/registers
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