參數(shù)資料
型號(hào): 74F533SJ
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Octal Transparent Latch with 3-STATE Outputs
中文描述: F/FAST SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO20
封裝: 5.30 MM, EIAJ TYPE2, SOP-20
文件頁數(shù): 2/12頁
文件大?。?/td> 97K
代理商: 74F533SJ
Philips Semiconductors
Product specification
74F533,*
74F534
Latch/flip-flop
74F533 Octal Transparent Latch, Inverting (3-State)
74F534 Octal D Flip-Flop, Inverting (3-State)
2
1999 Jan 08
853-0374 20616
* Discontinued part. Please see the Discontinued Products List.
FEATURES
8-bit positive edge-triggered register – 74F534
3-State inverting output buffers
Common 3-State Output register
Independent register and 3-State buffer operation
DESCRIPTION
The 74F533 is an octal transparent latch coupled to eight 3-State
output buffers. The two sections of the device are controlled
independently by Enable (E) and Output Enable (OE) control gates.
The data on the D inputs is transferred to the latch outputs when the
Enable (E) input is High. The latch remains transparent to the data
input while E is High and stores the data that is present one setup
time before the High-to-Low enable transition.
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. The
active Low Output Enable (OE) controls all eight 3-State buffers
independent of the latch operation. When OE is Low, the latched or
transparent data appears at the outputs. When OE is High, the
outputs are in high impedance “off” state, which means they will
neither drive nor load the bus.
The 74F534 is an 8-bit edge-triggered register coupled to eight
3-State output buffers. The two sections of the device are controlled
independently by the Clock (CP) and Output Enable (OE) control
gates.
The register is fully edge-triggered. The state of each D input, one
setup time before the Low-to-High clock transition is transferred to
the corresponding flip-flop’s Q output.
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. The
active Low Output Enable (OE) controls all eight 3-State buffers
independent of the latch operation. When OE is Low, the latched or
transparent data appears at the outputs. When OE is High, the
outputs are in high impedance “off” state, which means they will
neither drive nor load the bus.
TYPE
TYPICAL
PROPAGATION DELAY
TYPICAL SUPPLY
CURRENT
(TOTAL)
74F533
5.5ns
41mA
TYPE
TYPICAL f
MAX
TYPICAL SUPPLY
CURRENT
(TOTAL)
74F534
165MHz
51mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL
RANGE
V
CC
= 5V
±
10%,
T
amb
= 0
°
C to +70
°
C
PKG DWG #
20-Pin Plastic DIP
N74F534N
SOT146-1
20-Pin Plastic SOL
N74F534D
SOT163-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F (U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
D0 - D7
Data inputs
1.0/1.0
20
μ
A/0.6mA
20
μ
A/0.6mA
20
μ
A/0.6mA
20
μ
A/0.6mA
E (74F533)
Enable input (active High)
1.0/1.0
OE
Output Enable input (active Low)
1.0/1.0
CP (74F534)
Clock Pulse input (active rising edge)
1.0/1.0
Q0 - Q7
Data outputs
150/40
3.0mA/24mA
相關(guān)PDF資料
PDF描述
74F534 Octal D-Type Flip-Flop with 3-STATE Outputs
74F534PC Octal D-Type Flip-Flop with 3-STATE Outputs
74F534SC Octal D-Type Flip-Flop with 3-STATE Outputs
74F534SJ Octal D-Type Flip-Flop with 3-STATE Outputs
74F537 1-of-10 decoder 3-State
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
74F533SJCQB 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Octal Transparent Latch with TRI-STATE Outputs
74F533SJCX 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Octal Transparent Latch with TRI-STATE Outputs
74F533SJMQB 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Octal Transparent Latch with TRI-STATE Outputs
74F533SJMX 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Octal Transparent Latch with TRI-STATE Outputs
74F533SJX 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit D-Type Latch