參數(shù)資料
型號(hào): 74F533
廠商: NXP Semiconductors N.V.
英文描述: Latch/flip-flop
中文描述: 鎖存器/觸發(fā)器
文件頁數(shù): 7/12頁
文件大小: 97K
代理商: 74F533
Philips Semiconductors
Product specification
74F533,* 74F534
Latch/flip-flop
1999 Jan 08
7
* Discontinued part. Please see the Discontinued Products List.
AC SETUP REQUIREMENTS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITIONS
T
amb
= +25
°
C
V
= +5V
C
L
= 50pF, R
L
= 500
MIN
TYP
T
amb
= 0
°
C to +70
°
C
V
= +5.0V
±
10%
C
L
= 50pF, R
L
= 500
MIN
UNIT
MAX
MAX
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
Setup time,
Dn to E
Waveform 4
1.5
0
1.5
0
ns
Hold time,
Dn to E
74F533
Waveform 4
2.5
2.5
2.5
2.5
ns
t
w
(H)
E Pulse width,
High
Waveform 3
3.0
3.0
ns
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
w
(H)
t
w
(L)
Setup time,
Dn to CP
Waveform 5
2.0
2.0
2.5
2.5
ns
Hold time,
Dn to CP
74F534
Waveform 5
0
0
0
0
ns
CP pulse width,
High or Low
Waveform 1
3.0
3.5
3.5
4.0
ns
AC WAVEFORMS
For all waveforms, V
M
= 1.5V
The shaded areas indicate when the input is permitted to change for predictable output performance.
t
W
(H)
t
PLH
CP
Qn
V
M
V
M
V
M
V
M
V
M
1/f
MAX
t
W
(L)
t
PHL
SF00989
Waveform 1. Propagation Delay, Clock and Enable Inputs
to Output, Enable, Clock Pulse Widths,
and Maximum Clock Frequency
V
M
V
M
V
M
t
PHL
Dn
Qn
V
M
t
PLH
SF00990
Waveform 2. Propagation Delay for Data to Output
t
W
(H)
t
PLH
E
Qn
V
M
V
M
V
M
V
M
V
M
t
W
(L)
t
PHL
Dn
SF00991
Waveform 3. Propagation Delay, Enable Input to Output,
and Enable Pulse Width
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