參數(shù)資料
型號: 74F525SC
英文描述: Analog Timer Circuit
中文描述: 模擬定時器電路
文件頁數(shù): 1/8頁
文件大?。?/td> 79K
代理商: 74F525SC
2000 Fairchild Semiconductor Corporation
DS009545
www.fairchildsemi.com
April 1988
Revised October 2000
7
74F521
8-Bit Identity Comparator
General Description
The 74F521 is an expandable 8-bit comparator. It com-
pares two words of up to eight bits each and provides a
LOW output when the two words match bit for bit. The
expansion input I
A
=
B
also serves as an active LOW enable
input.
Features
I
Compares two 8-bit words in 6.5 ns typ
I
Expandable to any word length
I
20-pin package
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Order Number
74F521SC
74F521SJ
74F521MSA
74F521PC
Package Number
M20B
M20D
MSA20
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
相關PDF資料
PDF描述
74F521 8-bit identity comparator
74F521MSA 8-Bit Identity Comparator
74F521PC 8-Bit Identity Comparator
74F521SC 8-Bit Identity Comparator
74F521SJ 8-Bit Identity Comparator
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