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參數資料
| 型號： | 74F38 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Quad 2-input NAND buffer (open collector)(八通道2輸入與非門緩沖器（集電極開路）) |
| 中文描述： | 四2輸入與非緩沖器（集電極開路）（八通道2輸入與非門緩沖器（集電極開路）） |
| 文件頁數： | 2/8頁 |
| 文件大小： | 70K |
| 代理商： | 74F38 |
Philips Semiconductors
Product specification
74F38
Quad 2-input NAND buffer (open collector)
2
October 4, 1990
853–0052 00620
FEATURE
Industrial temperature range available (–40
°
C to +85
°
C)
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL
SUPPLY CURRENT
(TOTAL)
74F38
7.0ns
13mA
PIN CONFIGURATION
14
13
12
11
10
9
8
7
6
5
4
3
2
1
GND
V
CC
D2b
D2a
Q2
Q3
D3b
D3a
D0a
D0b
Q1
Q0
D1a
D1b
SF00001
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
±
10%, T
amb
= 0
°
C to +70
°
C
N74F38N
INDUSTRIAL RANGE
V
CC
= 5V
±
10%, T
amb
= –40
°
C to +85
°
C
I74F38N
PKG DWG #
14-pin plastic DIP
SOT27-1
14-pin plastic SO
N74F38D
I74F38D
SOT108-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
DESCRIPTION
74F (U.L.) HIGH/LOW
LOAD VALUE HIGH/LOW
20
μ
A/1.2mA
OC/64mA
Dna, Dnb
Data inputs
1.0/2.0
Qn
Data output
OC/106.7
NOTES:
1
One (1.0) FAST unit load is defined as: 20
μ
A in the high state and 0.6mA in the low state.
2
OC = open collector
LOGIC DIAGRAM
D0a
D0b
D1a
D1b
D2a
D2b
Q0
D3a
D3b
Q1
Q2
Q3
V
= Pin 14
GND = Pin 7
3
6
8
11
1
2
4
5
9
10
12
13
SF00002
FUNCTION TABLE
INPUTS
OUTPUT
Dna
Dnb
Qn
L
L
H
L
H
H
H
L
H
H
H
L
NOTES:
H = High voltage level
L
= Low voltage level
LOGIC SYMBOL
D0a D0bD1a
D2a D2b D3a D3b
D1b
Q0 Q1 Q2 Q3
3
6
8
11
1
2
4
5
9
10 12 13
V
= Pin 14
GND = Pin 7
SF00003
IEC/IEEE SYMBOL
1
2
4
5
9
10
12
13
&
3
6
8
11
SF00043
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