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參數(shù)資料
| 型號(hào)： | 74F283SJX |
| 英文描述： | Binary Adder |
| 中文描述： | 二進(jìn)制加法器 |
| 文件頁(yè)數(shù)： | 1/6頁(yè) |
| 文件大?。?/td> | 73K |
| 代理商： | 74F283SJX |
2000 Fairchild Semiconductor Corporation
DS009512
www.fairchildsemi.com
April 1988
Revised September 2000
7
74F280
9-Bit Parity Generator/Checker
General Description
The F280 is a high-speed parity generator/checker that
accepts nine bits of input data and detects whether an
even or an odd number of these inputs is HIGH. If an even
number of inputs is HIGH, the Sum Even output is HIGH. If
an odd number is HIGH, the Sum Even output is LOW. The
Sum Odd output is the complement of the Sum Even out-
put.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Order Number
74F280SC
74F280SJ
74F280PC
Package Number
M14A
M14D
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74F280 | 9-bit odd/even parity generator/checker |
| 74F280B | 9-bit odd/even parity generator/checker(9位奇偶發(fā)生器/校驗(yàn)器) |
| 74F280PC | 9-Bit Parity Generator/Checker |
| 74F280SC | 9-Bit Parity Generator/Checker |
| 74F280SJ | 9-Bit Parity Generator/Checker |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74F289N | 制造商:NXP Semiconductors 功能描述: |
| 74F2952 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Registered transceiver, non-inverting 3-State |
| 74F2953 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Registered transceiver, non-inverting 3-State |
| 74F298 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Quad 2-input multiplexer with storage |
| 74F298D | 制造商:North American Philips Discrete Products Div 功能描述:74F298D |
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