參數(shù)資料
型號(hào): 74F283
廠商: NXP Semiconductors N.V.
英文描述: 4-bit binary full adder with fast carry(帶快速進(jìn)位的4位二進(jìn)制全加器)
中文描述: 4位二進(jìn)制全加器快速進(jìn)行(帶快速進(jìn)位的4位二進(jìn)制全加器)
文件頁數(shù): 2/10頁
文件大?。?/td> 114K
代理商: 74F283
Philips Semiconductors
Product specification
74F283
4-bit binary full adder with fast carry
2
1989 Mar 03
853-0364 95944
FEATURES
High speed 4-bit addition
Cascadable in 4-bit increments
Fast Internal carry look-ahead
DESCRIPTION
The 74F283 adds two 4-bit binary words (An plus Bn) plus the
incoming carry. The binary sum appears on the sum outputs
(
Σ
0–
Σ
3) and the outgoing carry (C
OUT
) according to the equation:
C
IN
+2
0
(A0+B0)+2
1
(A1+B1)+2
2
(A2+B2)+2
3
(A3+B3)
=
Σ
0+2
Σ
1+4
Σ
2+8
Σ
3+16C
OUT
where (+)=plus
Due to the symmetry of the binary add function, the 74F283 can be
used with either all active-High operands (positive logic) or with all
active-Low operands (negative logic). See Function Table. In case of
all active-Low operands (negative logic) the results
Σ
1–
Σ
4 and C
OUT
should be interpreted also as active-Low. With active-High inputs,
C
IN
cannot be left open; it must be held Low when no “carry in” is
intended. Interchanging inputs of equal weight does not affect the
operation, thus A0, B0, C
IN
can arbitrarily be assigned to pins 5, 6,
7, etc.
Due to pin limitations, the intermediate carries of the 74F283 are not
brought out for use as inputs or outputs. However, other means can
be used to effectively insert a carry into, or bring a carry out from, an
intermediate stage.
PIN CONFIGURATION
7
14
13
12
11
10
9
6
5
4
3
2
1
V
CC
B2
A3
B3
C
OUT
A0
B1
B0
Σ
1
GND
A1
Σ
0
SF00852
Σ
3
Σ
2
C
IN
A2
8
16
15
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL
SUPPLY CURRENT
(TOTAL)
74F283
6.5ns
40mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
±
10%,
T
amb
= 0
°
C to +70
°
C
PKG DWG #
16-pin plastic DIP
N74F283N
SOT38-4
16-pin plastic SO
N74F283D
SOT109-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F(U.L.)
HIGH/LOW
1.0/2.0
1.0/2.0
1.0/1.0
50/33
50/33
LOAD VALUE
HIGH/LOW
20
μ
A/1.2mA
20
μ
A/1.2mA
20
μ
A/0.6mA
1.0mA/20mA
1.0mA/20mA
A0 - A3
B0 - B3
C
IN
C
OUT
Σ
0–
Σ
3
A operand inputs
B operand inputs
Carry input
Carry output
Sum outputs
NOTE:
One (1.0) FAST Unit Load is defined as: 20
μ
A in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
5
6
3
2
14 15 12
11
4
1
Σ
1
Σ
0
A0 B0 A1 B1 A2 B2 A3 B3
SF00853
13
10
Σ
3
Σ
2
9
7
C
IN
C
OUT
V
=Pin 16
GND=Pin 8
LOGIC SYMBOL (IEEE/IEC)
5
3
14
12
6
2
15
11
7
10
9
Σ
Σ
SF00854
13
1
4
CO
CI
0
3
0
3
P
Q
0
3
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