參數(shù)資料
    型號: 74F244MSAX
    英文描述: Dual 4-Bit Non-Inverting Buffer/Driver
    中文描述: 雙4位非反向緩沖器/驅(qū)動器
    文件頁數(shù): 2/12頁
    文件大?。?/td> 147K
    代理商: 74F244MSAX
    Philips Semiconductors
    Product specification
    74F240/74F240A/
    74F241/74F241A
    Buffers
    2
    853–0355 01345
    FEATURES
    Octal bus interface
    3-State buffer outputs sink 64mA
    15mA source current
    Guaranteed output skew less than 2.0ns
    (74F240A/74F241A)
    Reduced ground bounce (74F240A/74F241A)
    Reduced I
    CC
    (74F241A only)
    Reduced loading (74F240A I
    IL
    = 100
    μ
    A,
    74F241A I
    IL
    = 40
    μ
    A)
    DESCRIPTION
    The 74F240 and 74F241 are octal buffers that are ideal for
    driving bus lines of buffer memory address registers. The
    outputs are all capable of sinking 64mA and sourcing up to
    15mA. The device features two output enables, each
    controlling four of the 3–state outputs.
    The 74F240A and 74F241A are functionally equivalent to
    their non–A counterparts. They have been designed to
    reduce effects of ground noise. Other advantages are noted
    in the features.
    TYPE
    TYPICAL PROPAGATION DELAY
    TYPICAL SUPPLY CURRENT (TOTAL)
    74F240
    4.3ns
    37mA
    74F240A
    3.8ns
    40mA
    74F241
    5.0ns
    53mA
    74F241A
    4.5ns
    32mA
    ORDERING INFORMATION
    ORDER CODE
    DESCRIPTION
    COMMERCIAL RANGE
    V
    CC
    = 5V
    ±
    10%, T
    amb
    = 0
    °
    C to +70
    °
    C
    N74F240N, N74F240AN, N74F241N, N74F241AN
    PKG DWG #
    20–pin plastic DIP
    SOT146-1
    20–pin plastic SOL
    N74F240D, N74F240AD, N74F241D, N74F241AD
    SOT163-1
    20-pin plastic SSOP II
    N74F240DB
    SOT339-1
    INPUT AND OUTPUT LOADING AND FAN OUT TABLE
    PINS
    DESCRIPTION
    74F (U.L.)
    HIGH/LOW
    LOAD VALUE
    HIGH/LOW
    20
    μ
    A/1.0mA
    Data inputs (74F240)
    1.0/1.67
    Ian, Ibn
    Data inputs (74F240A)
    1.0/0.167
    20
    μ
    A/100
    μ
    A
    20
    μ
    A/1.6mA
    20
    μ
    A/40
    μ
    A
    Data inputs (74F241)
    1.0/2.67
    Data inputs (74F241A)
    1.0/0.067
    OEa, OEb
    Output enable inputs (active low) (74F240)
    1.0/0.33
    20
    μ
    A/0.2mA
    20
    μ
    A/100
    μ
    A
    20
    μ
    A/1.0mA
    20
    μ
    A/40
    μ
    A
    Output enable inputs (active low) (74F240A)
    1.0/0.167
    OEa, OEb
    Output enable input (74F241)
    1.0/1.67
    Output enable input (74F241A)
    1.0/0.067
    Yan, Ybn
    Data outputs (74F241, 74F241A)
    750/106.7
    15mA/64mA
    Yan, Ybn
    Data outputs (74F240, 74F240A)
    750/106.7
    15mA/64mA
    Note to input and output loading and fan out table
    One (1.0) FAST unit load is defined as: 20
    μ
    A in the high state and 0.6mA in the low state.
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