參數(shù)資料
型號: 74F191SC
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Up/Down Binary Counter with Preset and Ripple Clock
中文描述: F/FAST SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, PDSO16
封裝: 0.150 INCH, MS-012, SOIC-16
文件頁數(shù): 9/14頁
文件大?。?/td> 104K
代理商: 74F191SC
Philips Semiconductors
Product specification
74F191
Up/Down binary counter with reset and ripple clock
1995 Jul 17
9
AC WAVEFORMS
NOTE:
For all waveforms, V
M
= 1.5V
V
M
t
PLH
t
PHL
V
M
V
M
V
M
CP
RC, Q
n
, TC
1/f
MAX
t
W
(H)
t
W
(L)
SF00734
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency.
V
M
V
M
V
M
V
M
t
PHL
t
PLH
D
n
RC, TC, Q
n
SF00736
Waveform 3. Propagation Delay, Non-Inverting Path
V
M
V
M
V
M
t
W
(L)
t
REC
V
M
TC, Q
n
CP
PL
V
M
RC, Q
n
t
PLH
SF00738
t
PHL
Waveform 5. Parallel Load Pulse Width, Parallel Load to Output
Delay and Parallel Load to Clock Recovery Time
t
PLH
CE, CP
U/D
RC
V
M
V
M
V
M
V
M
SF00735
t
PHL
Waveform 2. Propagation Delay, Clock, Clock Enable or
Up/Down to Ripple Clock Output
V
M
V
M
V
M
V
M
t
PHL
t
PLH
U/D, D
n
RC, TC
SF00737
Waveform 4. Propagation Delay, Inverting Path
The shaded areas indicate when the input is permitted
to change for predictable output performance.
V
M
V
M
PL
t
S
(H)
t
h
(H)
t
S
(L)
t
h
(L)
V
M
CP
SF00739
V
M
V
M
CE,
D
n
U/D
Waveform 6. Data Set Up and Hold Times
相關(guān)PDF資料
PDF描述
74F191SJ Up/Down Binary Counter with Preset and Ripple Clock
74F191PC Up/Down Binary Counter with Preset and Ripple Clock
74F193 Up/down binary counter with separate up/down clocks(帶分離加減時鐘的加減二進制計數(shù)器)
74F194 4-bit bidirectional universal shift register(4位雙向通用移位寄存器)
74F195A 4-bit parallel-access shift register(4位并行訪問移位寄存器)
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