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參數(shù)資料
| 型號： | 74F1779 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 通用總線功能 |
| 英文描述： | 8-bit bidirectional binary counter -State |
| 中文描述： | 8位雙向二進制計數(shù)器國家 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 110K |
| 代理商： | 74F1779 |
Philips Semiconductors
Product specification
74F1779
8-bit bidirectional binary counter (3-State)
1989 Apr 06
7
AC SETUP REQUIREMENTS
SYMBOL
PARAMETER
TEST
CONDITION
T
amb
= +25
°
C
V
CC
= +5.0V
C
L
= 50pF, R
L
= 500
MIN
TYP
T
amb
= 0
°
C to +70
°
C
V
CC
= +5.0V
±
10%
C
L
= 50pF, R
L
= 500
MIN
UNIT
MAX
MAX
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
s
(H)
t
s
(L)
t
h
(H)
t
h
(L)
t
w
(H)
t
w
(L)
Setup time, High or Low
I/O
n
to CP
Hold time, High or Low
I/O
n
to CP
Setup time, High or Low
CET to CP
Waveform 3
4.0
3.5
4.5
3.5
ns
Waveform 3
0
0
0
0
ns
Waveform 3
4.5
7.0
5.0
8.0
ns
Hold time, High or Low
CET to CP
Waveform 3
0
0
0
0
ns
Setup time, High or Low
Sn to CP
Waveform 3
7.5
8.5
8.0
9.5
ns
Hold time, High or Low
Sn to CP
Waveform 3
0
0
0
0
ns
CP Pulse width,
High or Low
Waveform 1
3.0
4.5
3.0
5.5
ns
AC WAVEFORMS
For all waveforms, V
M
= 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
V
M
V
M
V
M
V
M
1/f
MAX
t
W
(L)
CP
I/On
t
W
(H)
TC
V
M
V
M
SF01263
t
PHL
t
PLH
t
PLH
t
PHL
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
V
M
V
M
V
M
V
M
t
PLH
t
PHL
CET
TC
SF01264
Waveform 2. Propagation Delay,
CET Input to Terminal Count Output
CP
V
M
V
M
V
M
V
M
t
h
(L)
t
h
(H)
Sn, I/On,
CET
SF01265
V
M
V
M
t
s
(H)
t
s
(L)
Waveform 3. Data Setup and Hold Times
V
M
V
M
V
M
t
PHZ
t
PZH
OE
V
OH
-0.3V
0V
SF01266
I/On
Waveform 4. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
V
M
V
M
V
M
t
PLZ
t
PZL
V
OL
+0.3V
SF01267
3.5V
OE
I/On
Waveform 5. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
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