![](http://datasheet.mmic.net.cn/230000/74F158A_datasheet_15562924/74F158A_2.png)
Philips Semiconductors
Product specification
74F157A, 74F158A
Data selectors/multiplexers
74F157A:
74F158A:
Quad 2-input data selector/multiplexer, non-inverting
Quad 2-input data selector/multiplexer, inverting
2
1996 Mar 12
853-0346 16555
DESCRIPTION
The 74F157A is a high speed Quad 2-Input Multiplexer which
selects 4 bits of data from one of two sources under the control of a
common Select input (S). The Enable input (E) is active when Low.
When E is High, all of the outputs (Yn) are forced Low regardless of
all other input conditions.
Moving data from two registers to a common output bus is a
common use of the 74F157A. The state of the Select input
determines the particular register from which the data comes.
The device is the logic implementation of a 4-pole, 2-position switch
where the position of the switch is determined by the logic levels
supplied to the Select input.
The 74F158A is similar, but has inverting outputs (Yn).
Industrial temperature range (–10
°
C to +85
°
C) available for
74F157A
TYPE
TYPICAL
PROPAGATION
DELAY
4.6ns
4.6ns
3.7ns
3.7ns
TYPICAL
SUPPLY CURRENT
(TOTAL)
15mA
15mA
10mA
10mA
74F157
74F157A
74F158
74F158A
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
±
10%, T
amb
= 0
°
C to +70
°
C
N74F157AN, N174F158AN
INDUSTRIAL RANGE
V
CC
= 5V
±
10%, T
amb
= –40
°
C to +85
°
C
I74F157AN
PKG. DWG. #
16-pin plastic DIP
SOT38-4
16-pin plastic SO
N74F157AD, N74F158AD
I74F157AD
SOT109-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
Ina, Inb, Inc, Ind
Data inputs
S
Select input
E
Enable input
Ya–Yd
Data outputs (74F157/74F157A)
Ya–Yd
Data outputs (74F158/74F158A)
NOTE:
One (1.0) FAST unit load is defined as: 20
μ
A in the High state and 0.6mA in the Low state.
DESCRIPTION
74F (U.L.) HIGH/LOW
1.0/1.0
1.0/1.0
1.0/1.0
50/33
50/33
LOAD VALUE HIGH/LOW
20
μ
A/0.6mA
20
μ
A/0.6mA
20
μ
A/0.6mA
1.0mA/20mA
1.0mA/20mA
PIN CONFIGURATIONS, 74F157A 74F158A
16
15
14
13
12
11
10
7
6
5
4
3
2
1
Yb
V
CC
Yd
I0c
I1c
I1d
E
I0d
S
I0a
I1b
I1a
Ya
I0b
9
8
GND
Yc
SF00215
16
15
14
13
12
11
10
7
6
5
4
3
2
1
Yb
V
CC
Yd
I0c
I1c
I1d
E
I0d
S
I0a
I1b
I1a
Ya
I0b
9
8
GND
Yc
SF00216
LOGIC SYMBOLS, 74F157A 74F158A
V
= Pin 16
GND = Pin 8
SF00217
1
15
S
E
2
3
5
6
11
10
14
I0a
I1a
I0b
I1b
I0c
I1c
I0d
Ya
Yb
Yc
Yd
4
7
9
12
13
I1d
V
= Pin 16
GND = Pin 8
SF00218
1
15
S
E
2
3
5
6
11
10
14
I0a
I1a
I0b
I1b
I0c
I1c
I0d
Ya
Yb
Yc
Yd
4
7
9
12
13
I1d