• 參數(shù)資料
    型號: 74F14
    廠商: NXP Semiconductors N.V.
    英文描述: Hex inverter Schmitt trigger
    中文描述: 十六進(jìn)制逆變器施密特觸發(fā)器
    文件頁數(shù): 2/8頁
    文件大?。?/td> 70K
    代理商: 74F14
    Philips Semiconductors
    Product specification
    74F14
    Hex inverter Schmitt trigger
    2
    November 26, 1990
    853 0331 01123
    FEATURE
    Industrial temperature range available (–40
    °
    C to +85
    °
    C)
    TYPE
    TYPICAL
    PROPAGATION
    DELAY
    TYPICAL SUPPLY
    CURRENT
    (TOTAL)
    74F14
    5.0ns
    18mA
    DESCRIPTION
    The 74F14 contains six logic inverters which accept standard TTL
    input signals and provide standard TTL output levels. They are
    capable of transforming slowly changing input signals into sharply
    defined, jitter free output signals. In addition, they have greater noise
    margin than conventional inverters. Each circuit contains a Schmitt
    trigger followed by a Darlington level shifter and a phase splitter
    driving a TTL totem-pole output. The Schmitt trigger uses positive
    feedback to effectively speed-up slow input transitions, and provide
    different input threshold voltages for positive-going and negative-going
    input threshold (typically 800mV) is determined internally by resistor
    ratios and is insensitive to temperature and supply voltage variations.
    PIN CONFIGURATION
    14
    13
    12
    11
    10
    9
    8
    7
    6
    5
    4
    3
    2
    1
    GND
    V
    CC
    Q4
    D3
    Q3
    D4
    D5
    Q5
    D0
    Q0
    Q2
    D1
    Q1
    D2
    SF00028
    ORDERING INFORMATION
    ORDER CODE
    DESCRIPTION
    COMMERCIAL RANGE
    V
    CC
    = 5V
    ±
    10%, T
    amb
    = 0
    °
    C to +70
    °
    C
    N74F14N
    INDUSTRIAL RANGE
    V
    CC
    = 5V
    ±
    10%, T
    amb
    = –40
    °
    C to +85
    °
    C
    I74F14N
    PKG DWG #
    14-pin plastic DIP
    SOT27-1
    14-pin plastic SO
    N74F14D
    I74F14D
    SOT108-1
    INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
    PINS
    DESCRIPTION
    74F (U.L.) HIGH/LOW
    LOAD VALUE HIGH/LOW
    Dn
    Data inputs
    1.0/1.0
    20
    μ
    A/0.6mA
    Qn
    Data output
    50/33
    1.0mA/20mA
    NOTE:
    1
    One (1.0) FAST unit load is defined as: 20
    μ
    A in the High state and 0.6mA in the Low state.
    LOGIC DIAGRAM
    V
    = Pin 14
    GND = Pin 7
    SF00029
    2
    4
    6
    8
    10
    12
    Q0
    Q1
    Q2
    Q3
    Q4
    Q5
    1
    3
    5
    9
    11
    13
    D0
    D1
    D2
    D3
    D4
    D5
    FUNCTION TABLE
    INPUTS
    OUTPUT
    Dn
    Qn
    L
    H
    H
    L
    NOTES:
    H = High voltage level
    L
    = Low voltage level
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