
74CBTLV3861
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NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 16 December 2011
11 of 18
NXP Semiconductors
74CBTLV3861
10-bit bus switch with output enable
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 17. Test circuit for measuring switching times
VM
tW
10 %
90 %
0 V
VI
negative
pulse
positive
pulse
0 V
VM
90 %
10 %
tf
tr
tf
001aae331
VEXT
VCC
VI
VO
DUT
CL
RT
RL
G
Table 10.
Test data
Supply voltage
Load
VEXT
VCC
CL
RL
tPLH, tPHL
tPZH, tPHZ
tPZL, tPLZ
2.3 V to 2.7 V
30 pF
500
open
GND
2VCC
3.0 V to 3.6 V
50 pF
500
open
GND
2VCC