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參數(shù)資料
| 型號： | 74CBTLV3861DK,118 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 1/18頁 |
| 文件大小： | 0K |
| 描述： | IC BUS SWITCH 10BIT 24SSOP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | 74CBTLV |
| 類型： | 總線開關(guān) |
| 電路： | 10 x 1:1 |
| 獨(dú)立電路： | 1 |
| 輸出電流高，低： | 15mA，64mA |
| 電壓電源： | 單電源 |
| 電源電壓： | 2.3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-SSOP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | 568-8417-6 |
1.
General description
The 74CBTLV3861 is a 10-bit bus switch with one output enable (OE) input. When OE is
LOW, the switch is closed and port A is connected to the B port. When OE is HIGH, the
switch is disabled.
To ensure the high-impedance OFF-state during power-up or power-down, OE should be
tied to the VCC through a pull-up resistor. The minimum value of the resistor is determined
by the current-sinking capability of the driver.
Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall
times across the entire VCC range from 2.3 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
2.
Features and benefits
Supply voltage range from 2.3 V to 3.6 V
High noise immunity
Complies with JEDEC standard:
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM AEC-Q100-011 revision B exceeds 1000 V
5
switch connection between two ports
Rail to rail switching on data I/O ports
CMOS low power consumption
Latch-up performance exceeds 250 mA per JESD78B Class I level A
IOFF circuitry provides partial Power-down mode operation
Multiple package options
Specified from
40 Cto+85 C and 40 Cto+125 C
74CBTLV3861
10-bit bus switch with output enable
Rev. 3 — 16 December 2011
Product data sheet
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